[PATCH] D140012: [AMDGPU] Clean up SReg classes

Jay Foad via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 14 05:36:41 PST 2022


foad added a comment.

In D140012#3994669 <https://reviews.llvm.org/D140012#3994669>, @arsenm wrote:

> Does this multiply the number of generated register classes for all the without_subX cases?

I think you mean "with" not "without"? Anyway the total number of register classes decreases from 545 to 543. The diff is:

  +SReg_1_with_lo16_in_M0_CLASS_LO16RegClassID
  -SReg_LO16_XEXEC_HIRegClassID
  -SReg_LO16_XM0RegClassID
  -SReg_LO16_XEXEC_HI_and_SReg_LO16_XM0RegClassID
  -SReg_LO16_XM0_XEXECRegClassID
  -SRegOrLds_32_and_SReg_1RegClassID
  +SReg_32_XEXECRegClassID
  +SReg_32_XEXEC_HI_and_SReg_32_XM0RegClassID


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140012/new/

https://reviews.llvm.org/D140012



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