[llvm] 463910a - [X86] Don't fold scalar_to_vector(i64 C) -> vzext_movl(scalar_to_vector(i32 C))

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 14 04:11:23 PST 2022


Author: Simon Pilgrim
Date: 2022-12-14T12:11:06Z
New Revision: 463910ab2a8d95dd08ddba60f81b418693c8ee5b

URL: https://github.com/llvm/llvm-project/commit/463910ab2a8d95dd08ddba60f81b418693c8ee5b
DIFF: https://github.com/llvm/llvm-project/commit/463910ab2a8d95dd08ddba60f81b418693c8ee5b.diff

LOG: [X86] Don't fold scalar_to_vector(i64 C) -> vzext_movl(scalar_to_vector(i32 C))

Fixes constant-folding infinite loop reported by @uabelho on rG5ca77541446d

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/vec_insert-7.ll
    llvm/test/CodeGen/X86/vector-shuffle-combining.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c627d366812b..52933c8c95e4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -55531,8 +55531,11 @@ static SDValue combineScalarToVector(SDNode *N, SelectionDAG &DAG) {
         if (Ld->getExtensionType() == Ext &&
             Ld->getMemoryVT().getScalarSizeInBits() <= 32)
           return Op;
-      if (IsZeroExt && DAG.MaskedValueIsZero(Op, APInt::getHighBitsSet(64, 32)))
-        return Op;
+      if (IsZeroExt) {
+        KnownBits Known = DAG.computeKnownBits(Op);
+        if (!Known.isConstant() && Known.countMinLeadingZeros() >= 32)
+          return Op;
+      }
       return SDValue();
     };
 

diff  --git a/llvm/test/CodeGen/X86/vec_insert-7.ll b/llvm/test/CodeGen/X86/vec_insert-7.ll
index 8fd6e3dd94b6..cea047453de4 100644
--- a/llvm/test/CodeGen/X86/vec_insert-7.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-7.ll
@@ -14,7 +14,8 @@ define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
 ;
 ; X64-LABEL: mmx_movzl:
 ; X64:       ## %bb.0:
-; X64-NEXT:    movaps {{.*#+}} xmm0 = [32,0,0,0]
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    movq %rax, %xmm0
 ; X64-NEXT:    retq
   %tmp = bitcast x86_mmx %x to <2 x i32>
   %tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0

diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
index b8fac4d73546..91f2a6715ff7 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining.ll
@@ -3530,3 +3530,30 @@ entry:
   store <4 x float> %21, ptr undef, align 16
   ret void
 }
+
+; Inifite loop test case reported on 5ca77541446d
+define void @autogen_SD25931() {
+; CHECK-LABEL: autogen_SD25931:
+; CHECK:       # %bb.0: # %BB
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  .LBB139_1: # %CF242
+; CHECK-NEXT:    # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    jmp .LBB139_1
+BB:
+  %Cmp16 = icmp uge <2 x i1> zeroinitializer, zeroinitializer
+  %Shuff19 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %Cmp16, <2 x i32> <i32 3, i32 1>
+  %Shuff33 = shufflevector <2 x i1> %Shuff19, <2 x i1> zeroinitializer, <2 x i32> <i32 0, i32 2>
+  br label %CF250
+
+CF250:                                            ; preds = %CF250, %BB
+  br i1 poison, label %CF250, label %CF259
+
+CF259:                                            ; preds = %CF250
+  %Cmp83 = icmp ule <2 x i1> %Shuff19, zeroinitializer
+  br label %CF242
+
+CF242:                                            ; preds = %CF242, %CF259
+  %Shuff153 = shufflevector <2 x i1> %Shuff33, <2 x i1> poison, <2 x i32> <i32 3, i32 1>
+  %Shuff161 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %Cmp83, <2 x i32> <i32 1, i32 3>
+  br label %CF242
+}


        


More information about the llvm-commits mailing list