[PATCH] D139997: [InstCombine] complete (X << Z) / (Y << Z) --> X / Y

[Chenbing.Zheng via Phabricator via llvm-commits]

Chenbing.Zheng created this revision.
Chenbing.Zheng added reviewers: spatel, RKSimon, benshi001.
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Add one more situation for this fold
For unsigned div,  'nsw' on both shifts + 'nuw' on the dividend.

Alive2: https://alive2.llvm.org/ce/z/sELF76


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139997

Files:
  llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
  llvm/test/Transforms/InstCombine/div-shift.ll


Index: llvm/test/Transforms/InstCombine/div-shift.ll
===================================================================
--- llvm/test/Transforms/InstCombine/div-shift.ll
+++ llvm/test/Transforms/InstCombine/div-shift.ll
@@ -951,13 +951,9 @@
   ret i8 %d
 }
 
-; TODO: This could fold.
-
 define i8 @udiv_shl_shl_nuw_nsw2(i8 %x, i8 %y, i8 %z) {
 ; CHECK-LABEL: @udiv_shl_shl_nuw_nsw2(
-; CHECK-NEXT:    [[XZ:%.*]] = shl nuw nsw i8 [[X:%.*]], [[Z:%.*]]
-; CHECK-NEXT:    [[YZ:%.*]] = shl nsw i8 [[Y:%.*]], [[Z]]
-; CHECK-NEXT:    [[D:%.*]] = udiv i8 [[XZ]], [[YZ]]
+; CHECK-NEXT:    [[D:%.*]] = udiv i8 [[X:%.*]], [[Y:%.*]]
 ; CHECK-NEXT:    ret i8 [[D]]
 ;
   %xz = shl nuw nsw i8 %x, %z
Index: llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -888,9 +888,13 @@
     auto *Shl0 = cast<OverflowingBinaryOperator>(Op0);
     auto *Shl1 = cast<OverflowingBinaryOperator>(Op1);
 
-    // For unsigned div, we need 'nuw' on both shifts.
+    // For unsigned div, we need 'nuw' on both shifts or
+    // 'nsw' on both shifts + 'nuw' on the dividend.
     // (X << Z) / (Y << Z) --> X / Y
-    if (!IsSigned && Shl0->hasNoUnsignedWrap() && Shl1->hasNoUnsignedWrap())
+    if (!IsSigned &&
+        ((Shl0->hasNoUnsignedWrap() && Shl1->hasNoUnsignedWrap()) ||
+         (Shl0->hasNoUnsignedWrap() && Shl0->hasNoSignedWrap() &&
+          Shl1->hasNoSignedWrap())))
       Ret = BinaryOperator::CreateUDiv(X, Y);
 
     // For signed div, we need 'nsw' on both shifts + 'nuw' on the divisor.


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