[PATCH] D139422: [AMDGPU] Accelerate SIRegisterInfo::getPhysRegClass
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 18:28:46 PST 2022
critson added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1434
+ if (!Reg.isPhysical())
+ return false;
+ auto RC = TRI.getPhysRegBaseClass(Reg);
----------------
arsenm wrote:
> It's even easier to do the class test on the virtual register
I am sorry, I don't know what you mean by "easier".
Easier as in less lines of code? Or, easier as in more computationally efficient?
Perhaps you are suggesting we replace most of this code with a call to `TRI->isSGPRReg()`?
However, this function should only be true for physical registers (not any SGPR reg).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139422/new/
https://reviews.llvm.org/D139422
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