[PATCH] D139616: [TableGen] Emit table mapping physical registers to base classes

[Carl Ritson via Phabricator via llvm-commits]

critson updated this revision to Diff 482646.
critson marked an inline comment as done.
critson added a comment.

- Extend available base class range by one


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139616/new/

https://reviews.llvm.org/D139616

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/include/llvm/Target/Target.td
  llvm/test/TableGen/RegisterInfoEmitter-BaseClassOrder.td
  llvm/utils/TableGen/CodeGenRegisters.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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