[PATCH] D138656: [CodeGen] Additional Register argument to storeRegToStackSlot/loadRegFromStackSlot
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 15:09:13 PST 2022
arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.
================
Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1064
/// is true, the register operand is the last use and must be marked kill.
+ /// VReg is the virtual register in case if SrcReg is the physical register.
+ /// This additional Register argument is needed for certain targets when
----------------
Still think the phrasing could be improved. How about something like:
> If \p SrcReg is being directly spilled as part of assigning a virtual register, \p VReg is the virtual register being assigned.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138656/new/
https://reviews.llvm.org/D138656
More information about the llvm-commits
mailing list