[PATCH] D139874: [AMDGPU] Lower VGPR to physical SGPR COPY to S_MOV_B32 if VGPR contains the compile time constant

[Matt Arsenault via Phabricator via llvm-commits]

arsenm requested changes to this revision.
arsenm added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:854
+            DefMI->getOpcode(), AMDGPU::OpName::src0));
+        if (SrcConst.isImm()) {
+          const TargetRegisterClass *DstRC = TRI->getPhysRegClass(DstReg);
----------------
Not isImm, but !isReg


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Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:855-856
+        if (SrcConst.isImm()) {
+          const TargetRegisterClass *DstRC = TRI->getPhysRegClass(DstReg);
+          unsigned MoveSize = TRI->getRegSizeInBits(*DstRC);
+          unsigned MoveOp =
----------------
Should prefer to get the class and size from the vreg. physregs are expensive


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  https://reviews.llvm.org/D139874/new/

https://reviews.llvm.org/D139874