[PATCH] D139656: [RISCV] Reuse VL (if non-zero) when building single element vector for start of reduction chain

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D139656#3992661 <https://reviews.llvm.org/D139656#3992661>, @reames wrote:

> Rebase over landed changes, and request re-review.
>
> @craig.topper Can you take a second look at this?  I think we might have been chasing a red herring on the LMUL2 and above concern for this patch.  This patch specifically only reuses VL at a callsite where we know that lmul is constrained to LMUL1 or less.  As such, I don't think we can get the over-constrained vmv.s.x issue we'd discussed in this patch.
>
> It's definitely still a real issue which can be exercised from the insert element path, but that has not (edit!) changed with this patch (or the preceding patches).

I think the overconstrained regalloc came up when we talked about using LMUL>1 vmv.s.x and an extract to LMUL=1. We still have a lot of vsetvlis in the LMUL>1 tests that could be removed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139656/new/

https://reviews.llvm.org/D139656