[PATCH] D139877: [RISCV][InsertVSETVLI] Reverse traversal order of block in post pass [nfc]

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 13 09:04:44 PST 2022


nemanjai added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp:1230
   SmallVector<MachineInstr*> ToDelete;
-  for (MachineInstr &MI : MBB) {
-    // Note: Must be *before* vsetvli handling to account for config cases
-    // which only change some subfields.
-    doUnion(Used, getDemanded(MI));
+  for (MachineInstr &MI : iterator_range(MBB.rbegin(), MBB.rend())) {
 
----------------
This causes failures with `-Werror`:

```
RISCVInsertVSETVLI.cpp:1230:27: error: 'iterator_range' may not intend to support class template argument deduction [-Werror,-Wctad-maybe-unsupported]
  for (MachineInstr &MI : iterator_range(MBB.rbegin(), MBB.rend())) {
                          ^
/home/nemanjai/llvm/Git/trunk1/llvm-project/llvm/include/llvm/ADT/iterator_range.h:30:7: note: add a deduction guide to suppress this warning
class iterator_range {
      ^
1 error generated.
```
Example: https://lab.llvm.org/buildbot/#/builders/36/builds/28344


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139877/new/

https://reviews.llvm.org/D139877



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