[llvm] 8e6c309 - [RISCV][InsertVSETVLI] Reverse traversal order of block in post pass [nfc]

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 13 07:54:16 PST 2022


Author: Philip Reames
Date: 2022-12-13T07:54:05-08:00
New Revision: 8e6c309451287091d7f79345c1b5c058a52cd13e

URL: https://github.com/llvm/llvm-project/commit/8e6c309451287091d7f79345c1b5c058a52cd13e
DIFF: https://github.com/llvm/llvm-project/commit/8e6c309451287091d7f79345c1b5c058a52cd13e.diff

LOG: [RISCV][InsertVSETVLI] Reverse traversal order of block in post pass [nfc]

his unblocks a following change to be more sophisticated during post pass rewriting.

Review wise, I basically just want a second set of eyes. This change should be straight forward, but since it took me an embarrassing number of attempts to get make check to pass. Let's make sure I'm not missing yet another cornercase.

Differential Revision: https://reviews.llvm.org/D139877

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index 08430f853df11..b2156e7f3c214 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1220,34 +1220,38 @@ static bool canMutatePriorConfig(const MachineInstr &PrevMI,
 }
 
 void RISCVInsertVSETVLI::doLocalPostpass(MachineBasicBlock &MBB) {
-  MachineInstr *PrevMI = nullptr;
+  MachineInstr *NextMI = nullptr;
+  // We can have arbitrary code in successors, so VL and VTYPE
+  // must be considered demanded.
   DemandedFields Used;
+  Used.VL = true;
+  Used.demandVTYPE();
   SmallVector<MachineInstr*> ToDelete;
-  for (MachineInstr &MI : MBB) {
-    // Note: Must be *before* vsetvli handling to account for config cases
-    // which only change some subfields.
-    doUnion(Used, getDemanded(MI));
+  for (MachineInstr &MI : iterator_range(MBB.rbegin(), MBB.rend())) {
 
-    if (!isVectorConfigInstr(MI))
+    if (!isVectorConfigInstr(MI)) {
+      doUnion(Used, getDemanded(MI));
       continue;
+    }
+
+    Register VRegDef = MI.getOperand(0).getReg();
+    if (VRegDef != RISCV::X0 &&
+        !(VRegDef.isVirtual() && MRI->use_nodbg_empty(VRegDef)))
+      Used.VL = true;
 
-    if (PrevMI) {
+    if (NextMI) {
       if (!Used.VL && !Used.usedVTYPE()) {
-        ToDelete.push_back(PrevMI);
-        // fallthrough
-      } else if (canMutatePriorConfig(*PrevMI, MI, Used)) {
-        PrevMI->getOperand(2).setImm(MI.getOperand(2).getImm());
         ToDelete.push_back(&MI);
-        // Leave PrevMI unchanged
+        // Leave NextMI unchanged
         continue;
+      } else if (canMutatePriorConfig(MI, *NextMI, Used)) {
+        MI.getOperand(2).setImm(NextMI->getOperand(2).getImm());
+        ToDelete.push_back(NextMI);
+        // fallthrough
       }
     }
-    PrevMI = &MI;
+    NextMI = &MI;
     Used = getDemanded(MI);
-    Register VRegDef = MI.getOperand(0).getReg();
-    if (VRegDef != RISCV::X0 &&
-        !(VRegDef.isVirtual() && MRI->use_nodbg_empty(VRegDef)))
-      Used.VL = true;
   }
 
   for (auto *MI : ToDelete)


        


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