[llvm] 9fa4620 - [AMDGPU] Add `.workgroup_processor_mode` to v5 MD
Pierre van Houtryve via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 07:44:58 PST 2022
Author: Pierre van Houtryve
Date: 2022-12-13T10:44:52-05:00
New Revision: 9fa46200ea2f77cb3db2590f4268a8fdbc3882c5
URL: https://github.com/llvm/llvm-project/commit/9fa46200ea2f77cb3db2590f4268a8fdbc3882c5
DIFF: https://github.com/llvm/llvm-project/commit/9fa46200ea2f77cb3db2590f4268a8fdbc3882c5.diff
LOG: [AMDGPU] Add `.workgroup_processor_mode` to v5 MD
Adds Workgroup Processor Mode (WGP) to the HSA Metadata for Code Object v5/GFX10+.
The field is already present as an asm directive and in the compute program resource register but is also needed in the MD.
Reviewed By: kzhuravl
Differential Revision: https://reviews.llvm.org/D139931
Added:
llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
Modified:
llvm/docs/AMDGPUUsage.rst
llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
llvm/lib/Target/AMDGPU/GCNSubtarget.h
Removed:
################################################################################
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index eac0883c49492..3030b14aaefcd 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -3571,12 +3571,14 @@ Code object V5 metadata is the same as
.. table:: AMDHSA Code Object V5 Kernel Metadata Map Additions
:name: amdgpu-amdhsa-code-object-kernel-metadata-map-table-v5
- ===================== ============= ========== =======================================
- String Key Value Type Required? Description
- ===================== ============= ========== =======================================
- ".uses_dynamic_stack" boolean Indicates if the generated machine code
- is using a dynamically sized stack.
- ===================== ============= ========== =======================================
+ ============================= ============= ========== =======================================
+ String Key Value Type Required? Description
+ ============================= ============= ========== =======================================
+ ".uses_dynamic_stack" boolean Indicates if the generated machine code
+ is using a dynamically sized stack.
+ ".workgroup_processor_mode" boolean (GFX10+) Controls ENABLE_WGP_MODE in
+ :ref:`amdgpu-amdhsa-kernel-descriptor-v3-table`.
+ ============================= ============= ========== =======================================
..
diff --git a/llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp b/llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
index b4659665443de..64d2c979b28d1 100644
--- a/llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
+++ b/llvm/lib/BinaryFormat/AMDGPUMetadataVerifier.cpp
@@ -262,6 +262,8 @@ bool MetadataVerifier::verifyKernel(msgpack::DocNode &Node) {
if (!verifyScalarEntry(KernelMap, ".uses_dynamic_stack", false,
msgpack::Type::Boolean))
return false;
+ if (!verifyIntegerEntry(KernelMap, ".workgroup_processor_mode", false))
+ return false;
if (!verifyIntegerEntry(KernelMap, ".kernarg_segment_align", true))
return false;
if (!verifyIntegerEntry(KernelMap, ".wavefront_size", true))
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
index 7a3446a71b470..2c578cc0042df 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
@@ -877,6 +877,9 @@ msgpack::MapDocNode MetadataStreamerMsgPackV3::getHSAKernelProps(
if (AMDGPU::getAmdhsaCodeObjectVersion() >= 5)
Kern[".uses_dynamic_stack"] =
Kern.getDocument()->getNode(ProgramInfo.DynamicCallStack);
+ if (AMDGPU::getAmdhsaCodeObjectVersion() >= 5 && STM.supportsWGP())
+ Kern[".workgroup_processor_mode"] =
+ Kern.getDocument()->getNode(ProgramInfo.WgpMode);
// FIXME: The metadata treats the minimum as 16?
Kern[".kernarg_segment_align"] =
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 1d035a2e3da52..5ebec834b1426 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -298,6 +298,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
/// the original value.
bool zeroesHigh16BitsOfDest(unsigned Opcode) const;
+ bool supportsWGP() const { return getGeneration() >= GFX10; }
+
bool hasIntClamp() const {
return HasIntClamp;
}
diff --git a/llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll b/llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
new file mode 100644
index 0000000000000..d1d5e23251f66
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/hsa-metadata-workgroup-processor-mode-v5.ll
@@ -0,0 +1,14 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=5 -mcpu=gfx1010 -mattr=+cumode < %s | FileCheck -check-prefix=GFX10 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=5 -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10-CU %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=5 -mcpu=gfx1100 -mattr=+cumode < %s | FileCheck -check-prefix=GFX10 %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa --amdhsa-code-object-version=5 -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX10-CU %s
+
+; GFX10: .amdhsa_workgroup_processor_mode 0
+; GFX10: .workgroup_processor_mode: 0
+; GFX10-CU: .amdhsa_workgroup_processor_mode 1
+; GFX10-CU: .workgroup_processor_mode: 1
+
+define amdgpu_kernel void @wavefrontsize() {
+entry:
+ ret void
+}
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