[PATCH] D110069: AArch64: use `CAS` instead of `LDX`/`STX` for more ops if available

[Tim Northover via Phabricator via llvm-commits]

t.p.northover marked 2 inline comments as done.
t.p.northover added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/atomicrmw-xchg-fp.ll:107
+; LSE-NEXT:    mov x4, x6
+; LSE-NEXT:    mov x5, x7
+; LSE-NEXT:    caspal x4, x5, x2, x3, [x0]
----------------
efriedma wrote:
> These moves seem very strange.
The first two are part of forming an `xseqregclass` thing from component registers, the second two are because `CASP` clobbers its input but we want to compare against it afterwards. Still not ideal, but not completely out there.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110069/new/

https://reviews.llvm.org/D110069