[llvm] b7232da - InstCombine: Regenerate checks
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 13 05:06:24 PST 2022
Author: Matt Arsenault
Date: 2022-12-13T08:06:19-05:00
New Revision: b7232dafe69eb04c1421743e4bd779d6ff3853be
URL: https://github.com/llvm/llvm-project/commit/b7232dafe69eb04c1421743e4bd779d6ff3853be
DIFF: https://github.com/llvm/llvm-project/commit/b7232dafe69eb04c1421743e4bd779d6ff3853be.diff
LOG: InstCombine: Regenerate checks
update_test_checks has changed what it emits for function labels,
so keep this noise out of a real output change.
Added:
Modified:
llvm/test/Transforms/InstCombine/is_fpclass.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/is_fpclass.ll b/llvm/test/Transforms/InstCombine/is_fpclass.ll
index eda819560802..a5480560152d 100644
--- a/llvm/test/Transforms/InstCombine/is_fpclass.ll
+++ b/llvm/test/Transforms/InstCombine/is_fpclass.ll
@@ -12,7 +12,7 @@
; }
define i1 @test_class_no_mask_f32(float %x) {
-; CHECK-LABEL: @test_class_no_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_no_mask_f32(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 0)
@@ -20,7 +20,7 @@ define i1 @test_class_no_mask_f32(float %x) {
}
define i1 @test_class_full_mask_f32(float %x) {
-; CHECK-LABEL: @test_class_full_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_full_mask_f32(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f32(float %x, i32 1023)
@@ -28,7 +28,7 @@ define i1 @test_class_full_mask_f32(float %x) {
}
define i1 @test_class_undef_no_mask_f32() {
-; CHECK-LABEL: @test_class_undef_no_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_undef_no_mask_f32(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f32(float undef, i32 0)
@@ -36,7 +36,7 @@ define i1 @test_class_undef_no_mask_f32() {
}
define i1 @test_class_undef_full_mask_f32() {
-; CHECK-LABEL: @test_class_undef_full_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_undef_full_mask_f32(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f32(float undef, i32 1023)
@@ -44,7 +44,7 @@ define i1 @test_class_undef_full_mask_f32() {
}
define i1 @test_class_poison_no_mask_f32() {
-; CHECK-LABEL: @test_class_poison_no_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_poison_no_mask_f32(
; CHECK-NEXT: ret i1 poison
;
%val = call i1 @llvm.is.fpclass.f32(float poison, i32 0)
@@ -52,7 +52,7 @@ define i1 @test_class_poison_no_mask_f32() {
}
define i1 @test_class_poison_full_mask_f32() {
-; CHECK-LABEL: @test_class_poison_full_mask_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_poison_full_mask_f32(
; CHECK-NEXT: ret i1 poison
;
%val = call i1 @llvm.is.fpclass.f32(float poison, i32 1023)
@@ -60,7 +60,7 @@ define i1 @test_class_poison_full_mask_f32() {
}
define i1 @test_class_undef_val_f32() {
-; CHECK-LABEL: @test_class_undef_val_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_undef_val_f32(
; CHECK-NEXT: ret i1 undef
;
%val = call i1 @llvm.is.fpclass.f32(float undef, i32 4)
@@ -68,7 +68,7 @@ define i1 @test_class_undef_val_f32() {
}
define i1 @test_class_poison_val_f32() {
-; CHECK-LABEL: @test_class_poison_val_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_poison_val_f32(
; CHECK-NEXT: ret i1 poison
;
%val = call i1 @llvm.is.fpclass.f32(float poison, i32 4)
@@ -88,7 +88,7 @@ define i1 @test_class_poison_val_f32() {
; }
define i1 @test_class_isnan_f32(float %x) {
-; CHECK-LABEL: @test_class_isnan_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_isnan_f32(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3)
; CHECK-NEXT: ret i1 [[VAL]]
;
@@ -97,7 +97,7 @@ define i1 @test_class_isnan_f32(float %x) {
}
define i1 @test_class_isnan_f32_strict(float %x) {
-; CHECK-LABEL: @test_class_isnan_f32_strict(
+; CHECK-LABEL: define {{[^@]+}}@test_class_isnan_f32_strict(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3) #[[ATTR1:[0-9]+]]
; CHECK-NEXT: ret i1 [[VAL]]
;
@@ -106,7 +106,7 @@ define i1 @test_class_isnan_f32_strict(float %x) {
}
define i1 @test_class_is_p0_n0_f32(float %x) {
-; CHECK-LABEL: @test_class_is_p0_n0_f32(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_p0_n0_f32(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96)
; CHECK-NEXT: ret i1 [[VAL]]
;
@@ -115,7 +115,7 @@ define i1 @test_class_is_p0_n0_f32(float %x) {
}
define i1 @test_class_is_p0_n0_f32_strict(float %x) {
-; CHECK-LABEL: @test_class_is_p0_n0_f32_strict(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_p0_n0_f32_strict(
; CHECK-NEXT: [[VAL:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 96) #[[ATTR1]]
; CHECK-NEXT: ret i1 [[VAL]]
;
@@ -124,7 +124,7 @@ define i1 @test_class_is_p0_n0_f32_strict(float %x) {
}
define i1 @test_constant_class_snan_test_snan_f64() {
-; CHECK-LABEL: @test_constant_class_snan_test_snan_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_snan_test_snan_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 1)
@@ -132,7 +132,7 @@ define i1 @test_constant_class_snan_test_snan_f64() {
}
define i1 @test_constant_class_qnan_test_qnan_f64() {
-; CHECK-LABEL: @test_constant_class_qnan_test_qnan_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_qnan_test_qnan_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 2)
@@ -140,7 +140,7 @@ define i1 @test_constant_class_qnan_test_qnan_f64() {
}
define i1 @test_constant_class_qnan_test_snan_f64() {
-; CHECK-LABEL: @test_constant_class_qnan_test_snan_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_qnan_test_snan_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 1)
@@ -148,7 +148,7 @@ define i1 @test_constant_class_qnan_test_snan_f64() {
}
define i1 @test_constant_class_ninf_test_ninf_f64() {
-; CHECK-LABEL: @test_constant_class_ninf_test_ninf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_ninf_test_ninf_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0xFFF0000000000000, i32 4)
@@ -156,7 +156,7 @@ define i1 @test_constant_class_ninf_test_ninf_f64() {
}
define i1 @test_constant_class_pinf_test_ninf_f64() {
-; CHECK-LABEL: @test_constant_class_pinf_test_ninf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pinf_test_ninf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000000, i32 4)
@@ -164,7 +164,7 @@ define i1 @test_constant_class_pinf_test_ninf_f64() {
}
define i1 @test_constant_class_qnan_test_ninf_f64() {
-; CHECK-LABEL: @test_constant_class_qnan_test_ninf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_qnan_test_ninf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 4)
@@ -172,7 +172,7 @@ define i1 @test_constant_class_qnan_test_ninf_f64() {
}
define i1 @test_constant_class_snan_test_ninf_f64() {
-; CHECK-LABEL: @test_constant_class_snan_test_ninf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_snan_test_ninf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 4)
@@ -180,7 +180,7 @@ define i1 @test_constant_class_snan_test_ninf_f64() {
}
define i1 @test_constant_class_nnormal_test_nnormal_f64() {
-; CHECK-LABEL: @test_constant_class_nnormal_test_nnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nnormal_test_nnormal_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double -1.0, i32 8)
@@ -188,7 +188,7 @@ define i1 @test_constant_class_nnormal_test_nnormal_f64() {
}
define i1 @test_constant_class_pnormal_test_nnormal_f64() {
-; CHECK-LABEL: @test_constant_class_pnormal_test_nnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pnormal_test_nnormal_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 1.0, i32 8)
@@ -196,7 +196,7 @@ define i1 @test_constant_class_pnormal_test_nnormal_f64() {
}
define i1 @test_constant_class_nsubnormal_test_nsubnormal_f64() {
-; CHECK-LABEL: @test_constant_class_nsubnormal_test_nsubnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nsubnormal_test_nsubnormal_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0x800fffffffffffff, i32 16)
@@ -204,7 +204,7 @@ define i1 @test_constant_class_nsubnormal_test_nsubnormal_f64() {
}
define i1 @test_constant_class_psubnormal_test_nsubnormal_f64() {
-; CHECK-LABEL: @test_constant_class_psubnormal_test_nsubnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_psubnormal_test_nsubnormal_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x000fffffffffffff, i32 16)
@@ -212,7 +212,7 @@ define i1 @test_constant_class_psubnormal_test_nsubnormal_f64() {
}
define i1 @test_constant_class_nzero_test_nzero_f64() {
-; CHECK-LABEL: @test_constant_class_nzero_test_nzero_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nzero_test_nzero_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double -0.0, i32 32)
@@ -220,7 +220,7 @@ define i1 @test_constant_class_nzero_test_nzero_f64() {
}
define i1 @test_constant_class_pzero_test_nzero_f64() {
-; CHECK-LABEL: @test_constant_class_pzero_test_nzero_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pzero_test_nzero_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0.0, i32 32)
@@ -228,7 +228,7 @@ define i1 @test_constant_class_pzero_test_nzero_f64() {
}
define i1 @test_constant_class_pzero_test_pzero_f64() {
-; CHECK-LABEL: @test_constant_class_pzero_test_pzero_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pzero_test_pzero_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0.0, i32 64)
@@ -236,7 +236,7 @@ define i1 @test_constant_class_pzero_test_pzero_f64() {
}
define i1 @test_constant_class_nzero_test_pzero_f64() {
-; CHECK-LABEL: @test_constant_class_nzero_test_pzero_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nzero_test_pzero_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double -0.0, i32 64)
@@ -244,7 +244,7 @@ define i1 @test_constant_class_nzero_test_pzero_f64() {
}
define i1 @test_constant_class_psubnormal_test_psubnormal_f64() {
-; CHECK-LABEL: @test_constant_class_psubnormal_test_psubnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_psubnormal_test_psubnormal_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0x000fffffffffffff, i32 128)
@@ -252,7 +252,7 @@ define i1 @test_constant_class_psubnormal_test_psubnormal_f64() {
}
define i1 @test_constant_class_nsubnormal_test_psubnormal_f64() {
-; CHECK-LABEL: @test_constant_class_nsubnormal_test_psubnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nsubnormal_test_psubnormal_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x800fffffffffffff, i32 128)
@@ -260,7 +260,7 @@ define i1 @test_constant_class_nsubnormal_test_psubnormal_f64() {
}
define i1 @test_constant_class_pnormal_test_pnormal_f64() {
-; CHECK-LABEL: @test_constant_class_pnormal_test_pnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pnormal_test_pnormal_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 1.0, i32 256)
@@ -268,7 +268,7 @@ define i1 @test_constant_class_pnormal_test_pnormal_f64() {
}
define i1 @test_constant_class_nnormal_test_pnormal_f64() {
-; CHECK-LABEL: @test_constant_class_nnormal_test_pnormal_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_nnormal_test_pnormal_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double -1.0, i32 256)
@@ -276,7 +276,7 @@ define i1 @test_constant_class_nnormal_test_pnormal_f64() {
}
define i1 @test_constant_class_pinf_test_pinf_f64() {
-; CHECK-LABEL: @test_constant_class_pinf_test_pinf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_pinf_test_pinf_f64(
; CHECK-NEXT: ret i1 true
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000000, i32 512)
@@ -284,7 +284,7 @@ define i1 @test_constant_class_pinf_test_pinf_f64() {
}
define i1 @test_constant_class_ninf_test_pinf_f64() {
-; CHECK-LABEL: @test_constant_class_ninf_test_pinf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_ninf_test_pinf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0xFFF0000000000000, i32 512)
@@ -292,7 +292,7 @@ define i1 @test_constant_class_ninf_test_pinf_f64() {
}
define i1 @test_constant_class_qnan_test_pinf_f64() {
-; CHECK-LABEL: @test_constant_class_qnan_test_pinf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_qnan_test_pinf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF8000000000000, i32 512)
@@ -300,7 +300,7 @@ define i1 @test_constant_class_qnan_test_pinf_f64() {
}
define i1 @test_constant_class_snan_test_pinf_f64() {
-; CHECK-LABEL: @test_constant_class_snan_test_pinf_f64(
+; CHECK-LABEL: define {{[^@]+}}@test_constant_class_snan_test_pinf_f64(
; CHECK-NEXT: ret i1 false
;
%val = call i1 @llvm.is.fpclass.f64(double 0x7FF0000000000001, i32 512)
@@ -308,7 +308,7 @@ define i1 @test_constant_class_snan_test_pinf_f64() {
}
define i1 @test_class_is_snan_nnan_src(float %x) {
-; CHECK-LABEL: @test_class_is_snan_nnan_src(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_snan_nnan_src(
; CHECK-NEXT: [[NNAN:%.*]] = fadd nnan float [[X:%.*]], 1.000000e+00
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NNAN]], i32 1)
; CHECK-NEXT: ret i1 [[CLASS]]
@@ -319,7 +319,7 @@ define i1 @test_class_is_snan_nnan_src(float %x) {
}
define i1 @test_class_is_qnan_nnan_src(float %x) {
-; CHECK-LABEL: @test_class_is_qnan_nnan_src(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_qnan_nnan_src(
; CHECK-NEXT: [[NNAN:%.*]] = fadd nnan float [[X:%.*]], 1.000000e+00
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NNAN]], i32 2)
; CHECK-NEXT: ret i1 [[CLASS]]
@@ -330,7 +330,7 @@ define i1 @test_class_is_qnan_nnan_src(float %x) {
}
define i1 @test_class_is_nan_nnan_src(float %x) {
-; CHECK-LABEL: @test_class_is_nan_nnan_src(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_nan_nnan_src(
; CHECK-NEXT: [[NNAN:%.*]] = fadd nnan float [[X:%.*]], 1.000000e+00
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NNAN]], i32 3)
; CHECK-NEXT: ret i1 [[CLASS]]
@@ -341,7 +341,7 @@ define i1 @test_class_is_nan_nnan_src(float %x) {
}
define i1 @test_class_is_nan_other_nnan_src(float %x) {
-; CHECK-LABEL: @test_class_is_nan_other_nnan_src(
+; CHECK-LABEL: define {{[^@]+}}@test_class_is_nan_other_nnan_src(
; CHECK-NEXT: [[NNAN:%.*]] = fadd nnan float [[X:%.*]], 1.000000e+00
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[NNAN]], i32 267)
; CHECK-NEXT: ret i1 [[CLASS]]
@@ -356,7 +356,7 @@ define i1 @test_class_is_nan_other_nnan_src(float %x) {
; --------------------------------------------------------------------
define i1 @test_class_not_is_nan(float %x) {
-; CHECK-LABEL: @test_class_not_is_nan(
+; CHECK-LABEL: define {{[^@]+}}@test_class_not_is_nan(
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3)
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[CLASS]], true
; CHECK-NEXT: ret i1 [[NOT]]
@@ -367,7 +367,7 @@ define i1 @test_class_not_is_nan(float %x) {
}
define i1 @test_class_not_is_nan_multi_use(float %x, ptr %ptr) {
-; CHECK-LABEL: @test_class_not_is_nan_multi_use(
+; CHECK-LABEL: define {{[^@]+}}@test_class_not_is_nan_multi_use(
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 3)
; CHECK-NEXT: store i1 [[CLASS]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[CLASS]], true
@@ -380,7 +380,7 @@ define i1 @test_class_not_is_nan_multi_use(float %x, ptr %ptr) {
}
define i1 @test_class_not_is_inf_nan(float %x) {
-; CHECK-LABEL: @test_class_not_is_inf_nan(
+; CHECK-LABEL: define {{[^@]+}}@test_class_not_is_inf_nan(
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 519)
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[CLASS]], true
; CHECK-NEXT: ret i1 [[NOT]]
@@ -391,7 +391,7 @@ define i1 @test_class_not_is_inf_nan(float %x) {
}
define i1 @test_class_not_is_normal(float %x) {
-; CHECK-LABEL: @test_class_not_is_normal(
+; CHECK-LABEL: define {{[^@]+}}@test_class_not_is_normal(
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 264)
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[CLASS]], true
; CHECK-NEXT: ret i1 [[NOT]]
@@ -402,7 +402,7 @@ define i1 @test_class_not_is_normal(float %x) {
}
define i1 @test_class_xor_false(float %x) {
-; CHECK-LABEL: @test_class_xor_false(
+; CHECK-LABEL: define {{[^@]+}}@test_class_xor_false(
; CHECK-NEXT: [[CLASS:%.*]] = call i1 @llvm.is.fpclass.f32(float [[X:%.*]], i32 33)
; CHECK-NEXT: ret i1 [[CLASS]]
;
@@ -412,7 +412,7 @@ define i1 @test_class_xor_false(float %x) {
}
define <2 x i1> @test_class_not_vector(<2 x float> %x) {
-; CHECK-LABEL: @test_class_not_vector(
+; CHECK-LABEL: define {{[^@]+}}@test_class_not_vector(
; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 33)
; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[CLASS]], <i1 true, i1 true>
; CHECK-NEXT: ret <2 x i1> [[NOT]]
@@ -423,7 +423,7 @@ define <2 x i1> @test_class_not_vector(<2 x float> %x) {
}
define <2 x i1> @test_class_xor_vector(<2 x float> %x) {
-; CHECK-LABEL: @test_class_xor_vector(
+; CHECK-LABEL: define {{[^@]+}}@test_class_xor_vector(
; CHECK-NEXT: [[CLASS:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[X:%.*]], i32 33)
; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[CLASS]], <i1 true, i1 false>
; CHECK-NEXT: ret <2 x i1> [[NOT]]
@@ -438,7 +438,7 @@ define <2 x i1> @test_class_xor_vector(<2 x float> %x) {
; --------------------------------------------------------------------
define i1 @test_fold_or_class_f32_0(float %a) {
-; CHECK-LABEL: @test_fold_or_class_f32_0(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or_class_f32_0(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
; CHECK-NEXT: [[CLASS1:%.*]] = fcmp uno float [[A]], 0.000000e+00
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -451,7 +451,7 @@ define i1 @test_fold_or_class_f32_0(float %a) {
}
define i1 @test_fold_or3_class_f32_0(float %a) {
-; CHECK-LABEL: @test_fold_or3_class_f32_0(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or3_class_f32_0(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 2)
; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 4)
@@ -468,7 +468,7 @@ define i1 @test_fold_or3_class_f32_0(float %a) {
}
define i1 @test_fold_or_all_tests_class_f32_0(float %a) {
-; CHECK-LABEL: @test_fold_or_all_tests_class_f32_0(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or_all_tests_class_f32_0(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 1)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 2)
; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 4)
@@ -513,7 +513,7 @@ define i1 @test_fold_or_all_tests_class_f32_0(float %a) {
}
define i1 @test_fold_or_class_f32_1(float %a) {
-; CHECK-LABEL: @test_fold_or_class_f32_1(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or_class_f32_1(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -526,7 +526,7 @@ define i1 @test_fold_or_class_f32_1(float %a) {
}
define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) {
-; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use0(
+; CHECK-LABEL: define {{[^@]+}}@test_no_fold_or_class_f32_multi_use0(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: store i1 [[CLASS0]], ptr [[PTR:%.*]], align 1
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
@@ -541,7 +541,7 @@ define i1 @test_no_fold_or_class_f32_multi_use0(float %a, ptr %ptr) {
}
define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) {
-; CHECK-LABEL: @test_no_fold_or_class_f32_multi_use1(
+; CHECK-LABEL: define {{[^@]+}}@test_no_fold_or_class_f32_multi_use1(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 8)
; CHECK-NEXT: store i1 [[CLASS1]], ptr [[PTR:%.*]], align 1
@@ -556,7 +556,7 @@ define i1 @test_no_fold_or_class_f32_multi_use1(float %a, ptr %ptr) {
}
define i1 @test_fold_or_class_f32_2(float %a) {
-; CHECK-LABEL: @test_fold_or_class_f32_2(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or_class_f32_2(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 7)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A]], i32 7)
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -569,7 +569,7 @@ define i1 @test_fold_or_class_f32_2(float %a) {
}
define i1 @test_no_fold_or_class_f32_0(float %a, float %b) {
-; CHECK-LABEL: @test_no_fold_or_class_f32_0(
+; CHECK-LABEL: define {{[^@]+}}@test_no_fold_or_class_f32_0(
; CHECK-NEXT: [[CLASS0:%.*]] = call i1 @llvm.is.fpclass.f32(float [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float [[B:%.*]], i32 8)
; CHECK-NEXT: [[OR:%.*]] = or i1 [[CLASS0]], [[CLASS1]]
@@ -582,7 +582,7 @@ define i1 @test_no_fold_or_class_f32_0(float %a, float %b) {
}
define <2 x i1> @test_fold_or_class_v2f32(<2 x float> %a) {
-; CHECK-LABEL: @test_fold_or_class_v2f32(
+; CHECK-LABEL: define {{[^@]+}}@test_fold_or_class_v2f32(
; CHECK-NEXT: [[CLASS0:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A:%.*]], i32 4)
; CHECK-NEXT: [[CLASS1:%.*]] = call <2 x i1> @llvm.is.fpclass.v2f32(<2 x float> [[A]], i32 8)
; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[CLASS0]], [[CLASS1]]
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