[llvm] 5e89876 - Revert "[RISC-V][HWASAN] Support tagging global variables for RISC-V HWASAN"

Alexey Baturo via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 13 04:18:11 PST 2022


Author: Alexey Baturo
Date: 2022-12-13T15:17:40+03:00
New Revision: 5e89876538ac51797b6699f66545658726d4d8e2

URL: https://github.com/llvm/llvm-project/commit/5e89876538ac51797b6699f66545658726d4d8e2
DIFF: https://github.com/llvm/llvm-project/commit/5e89876538ac51797b6699f66545658726d4d8e2.diff

LOG: Revert "[RISC-V][HWASAN] Support tagging global variables for RISC-V HWASAN"

This reverts commit 11937ca5642216a67e021e69fc824f709267bada.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCV.td
    llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    llvm/test/CodeGen/RISCV/tagged-globals.ll


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCV.td b/llvm/lib/Target/RISCV/RISCV.td
index fd0dd8a759ca7..cde63564e5c40 100644
--- a/llvm/lib/Target/RISCV/RISCV.td
+++ b/llvm/lib/Target/RISCV/RISCV.td
@@ -525,11 +525,6 @@ def FeatureForcedAtomics : SubtargetFeature<
 def HasAtomicLdSt
     : Predicate<"Subtarget->hasStdExtA() || Subtarget->hasForcedAtomics()">;
 
-def FeatureTaggedGlobals : SubtargetFeature<"tagged-globals",
-    "AllowTaggedGlobals",
-    "true", "Use an instruction sequence for taking the address of a global "
-    "that allows a memory tag in the upper address bits">;
-
 //===----------------------------------------------------------------------===//
 // Named operands for CSR instructions.
 //===----------------------------------------------------------------------===//

diff  --git a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
index 70ae6eba4f8db..78fc58b69d8ad 100644
--- a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
@@ -333,12 +333,8 @@ bool RISCVPreRAExpandPseudo::expandLoadAddress(
     MachineBasicBlock::iterator &NextMBBI) {
   MachineFunction *MF = MBB.getParent();
 
+  assert(MF->getTarget().isPositionIndependent());
   const auto &STI = MF->getSubtarget<RISCVSubtarget>();
-  // When HWASAN is used and tagging of global variables is enabled
-  // they should be accessed via the GOT, since the tagged address of a global
-  // is incompatible with existing code models. This also applies to non-pic
-  // mode.
-  assert(MF->getTarget().isPositionIndependent() || STI.allowTaggedGlobals());
   unsigned SecondOpcode = STI.is64Bit() ? RISCV::LD : RISCV::LW;
   return expandAuipcInstPair(MBB, MBBI, NextMBBI, RISCVII::MO_GOT_HI,
                              SecondOpcode);

diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 4010dc88fe2d2..7efaefd00ba7d 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -4230,13 +4230,9 @@ SDValue RISCVTargetLowering::getAddr(NodeTy *N, SelectionDAG &DAG,
   SDLoc DL(N);
   EVT Ty = getPointerTy(DAG.getDataLayout());
 
-  // When HWASAN is used and tagging of global variables is enabled
-  // they should be accessed via the GOT, since the tagged address of a global
-  // is incompatible with existing code models. This also applies to non-pic
-  // mode.
-  if (isPositionIndependent() || Subtarget.allowTaggedGlobals()) {
+  if (isPositionIndependent()) {
     SDValue Addr = getTargetNode(N, DL, Ty, DAG, 0);
-    if (IsLocal && !Subtarget.allowTaggedGlobals())
+    if (IsLocal)
       // Use PC-relative addressing to access the symbol. This generates the
       // pattern (PseudoLLA sym), which expands to (addi (auipc %pcrel_hi(sym))
       // %pcrel_lo(auipc)).

diff  --git a/llvm/test/CodeGen/RISCV/tagged-globals.ll b/llvm/test/CodeGen/RISCV/tagged-globals.ll
deleted file mode 100644
index 21be791c366b0..0000000000000
--- a/llvm/test/CodeGen/RISCV/tagged-globals.ll
+++ /dev/null
@@ -1,87 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no-generate-body-for-unused-prefixes
-; RUN: llc --relocation-model=pic < %s | FileCheck %s
-; RUN: llc --relocation-model=static < %s | FileCheck %s
-
- at global_ext = external global i32
- at global_int = internal global i32 0
-declare void @func()
-
-define i32* @global_addr() #0 {
-; CHECK-LABEL: global_addr:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi0:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_ext)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi0)(a0)
-; CHECK-NEXT:    ret
-  ret i32* @global_ext
-}
-
-define i32 @global_load() #0 {
-; CHECK-LABEL: global_load:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi1:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_ext)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi1)(a0)
-; CHECK-NEXT:    lw a0, 0(a0)
-; CHECK-NEXT:    ret
-  %load = load i32, i32* @global_ext
-  ret i32 %load
-}
-
-define void @global_store() #0 {
-; CHECK-LABEL: global_store:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi2:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_ext)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi2)(a0)
-; CHECK-NEXT:    sw zero, 0(a0)
-; CHECK-NEXT:    ret
-  store i32 0, i32* @global_ext
-  ret void
-}
-
-define i32* @global_int_addr() #0 {
-; CHECK-LABEL: global_int_addr:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi3:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_int)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi3)(a0)
-; CHECK-NEXT:    ret
-  ret i32* @global_int
-}
-
-define i32 @global_int_load() #0 {
-; CHECK-LABEL: global_int_load:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi4:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_int)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi4)(a0)
-; CHECK-NEXT:    lw a0, 0(a0)
-; CHECK-NEXT:    ret
-  %load = load i32, i32* @global_int
-  ret i32 %load
-}
-
-define void @global_int_store() #0 {
-; CHECK-LABEL: global_int_store:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi5:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(global_int)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi5)(a0)
-; CHECK-NEXT:    sw zero, 0(a0)
-; CHECK-NEXT:    ret
-  store i32 0, i32* @global_int
-  ret void
-}
-
-define void ()* @func_addr() #0 {
-; CHECK-LABEL: func_addr:
-; CHECK:       # %bb.0:
-; CHECK-NEXT:  .Lpcrel_hi6:
-; CHECK-NEXT:    auipc a0, %got_pcrel_hi(func)
-; CHECK-NEXT:    ld a0, %pcrel_lo(.Lpcrel_hi6)(a0)
-; CHECK-NEXT:    ret
-  ret void ()* @func
-}
-
-attributes #0 = { "target-features"="+tagged-globals" }


        


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