[PATCH] D139914: [NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to materialize.

Esme Yi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 12 23:23:00 PST 2022


Esme created this revision.
Esme added reviewers: shchenz, PowerPC, stefanp.
Herald added a subscriber: nemanjai.
Herald added a project: All.
Esme requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139914

Files:
  llvm/test/CodeGen/PowerPC/constants-i64.ll


Index: llvm/test/CodeGen/PowerPC/constants-i64.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/constants-i64.ll
+++ llvm/test/CodeGen/PowerPC/constants-i64.ll
@@ -375,4 +375,30 @@
   ret i64 11174473921
 }
 
+define i64 @imm19() {
+; CHECK-LABEL: imm19:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:  lis 3, -13105
+; CHECK-NEXT:  ori 3, 3, 52479
+; CHECK-NEXT:  rldic 3, 3, 32, 0
+; CHECK-NEXT:  oris 3, 3, 52431
+; CHECK-NEXT:  ori 3, 3, 291
+; CHECK-NEXT:  blr
+entry:
+  ret i64 14758239902941249827 ;0xCCCFCCFFCCCF0123
+}
+
+define i64 @imm20() {
+; CHECK-LABEL: imm20:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:  lis 3, -13057
+; CHECK-NEXT:  ori 3, 3, 52479
+; CHECK-NEXT:  rldic 3, 3, 32, 0
+; CHECK-NEXT:  oris 3, 3, 291
+; CHECK-NEXT:  ori 3, 3, 52479
+; CHECK-NEXT:  blr
+entry:
+  ret i64 14771750698406366463 ;0xCCFFCCFF0123CCFF
+}
+
 attributes #0 = { nounwind readnone }


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