[PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size (WIP)

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D139732#3989415 <https://reviews.llvm.org/D139732#3989415>, @vpykhtin wrote:

> While working on SGPR test I understood that my implementation is pretty naive because I was lucky to start with VGPRs where every register has every subreg. Now I understand that selection of replacement register is more complicated due to alignment of SGPR tuples on 2,3,4.

there are also VGPRs with alignment requirements for mi-200


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https://reviews.llvm.org/D139732