[PATCH] D139852: [amdgpu] Lower CopyToReg into SGPR explicitly to avoid illegal vgpr to sgpr copy

[Jon Chesterfield via Phabricator via llvm-commits]

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Works around regression in D131246 <https://reviews.llvm.org/D131246> to unblock LDS lowering in D139433 <https://reviews.llvm.org/D139433>.

The bug there was ISel using a single i32 constant node as the argument to a
node that wants it in a vgpr and another one that wants it in a sgpr. If the
lowering puts it in a vgpr and SIFixSGPRCopies fails to handle it, as is
presently the case, then we get an error and a miscompile.

This is very much a point fix. If we need to copy into a sgpr, it's going to
need an instruction to do so (unless the sgpr happens to have the right value
in it already, which we could catch as a peephole somewhere in MIR if we wish)
so selecting the s_mov_b32 immediately doesn't cost anything. It only looks
for i32 values as I believe that is the type we use for sgpr copies.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139852

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/CopyToReg-into-sgpr-into-MOV_B32.ll

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