[PATCH] D139817: [AMDGPU] Legalize soffset of buffer instruction
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 12 02:46:36 PST 2022
foad added a comment.
Looks good.
================
Comment at: llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll:3
+
+define float @llvm_amdgcn_raw_buffer_load_f32(<4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
+ ; CHECK-LABEL: name: llvm_amdgcn_raw_buffer_load_f32
----------------
Remove `inreg` throughout? I don't think it does anything unless you use one of the graphics calling conventionsl like `amdgpu_ps`.
Also, you are using a non-uniform %rsrc so the compiler is (correctly) generating a waterfall loop, but that's not what you're testing for here. So could you change the test to use a uniform %rsrc, and then the generated code would be much simpler, and you could use `update_mir_test_checks.py`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139817/new/
https://reviews.llvm.org/D139817
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