[PATCH] D139780: [AMDGPU] Annotate control flow on visited blocks

Ruiling, Song via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 11 23:11:04 PST 2022


ruiling added a comment.

Thanks for working on this, but I think it is more reasonable to fix the issue early. The function is showing a problem in our cfg lowering passes for AMDGPU. The cfg lowering are being done by several passes. I know it is very tricky and fragile now, so it is not easy to determine what the right fix should be. For this specific case, the input IR does not have a return block, thus bypass the structurizeCFG pass. The AMDGPUUnifyDivergentExits happened before StructurizeCFG already has some ability to handle infinite loops, but this case was skipped because of the check `if (PDT.root_size() <= 1)`. In this case, BB3 is a root in PDT but it is not a true exit. I would suggest we change this. If there is only one root in PostDominatorTree, please check whether it ends with return/unreachable instruction before we can skip the transformation. If the single root in PDT ends with a branch instruction, we should continue the transformation to insert a dummy return block and insert a control flow edge that is never taken with trick like `br i1 true, ..., DummyReturn`. By doing this, we should be able to lower the cfg correctly.


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