[PATCH] D139809: [AArch64] Add FP16 instructions to isAssociativeAndCommutative

[KAWASHIMA Takahiro via Phabricator via llvm-commits]

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This is one of patch series split from D138107 <https://reviews.llvm.org/D138107>.

`-mcpu=` in `llvm/test/CodeGen/AArch64/machine-combiner.ll` is changed
to `cortex-a710` to use FP16 and SVE/SVE2 instructions. By this, the
register allocation and/or instruction scheduling are slightly changed
and some existing `CHECK` lines need to be updated.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139809

Files:
  llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-combiner.ll

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