[PATCH] D134792: [PowerPC][GISel] support 64 bit load/store

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 11 18:09:16 PST 2022


shchenz marked an inline comment as done.
shchenz added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp:135
+    // Check if that load feeds fp instructions.
+    if (any_of(MRI.use_nodbg_instructions(MI.getOperand(0).getReg()),
+               [&](const MachineInstr &UseMI) {
----------------
arsenm wrote:
> The tests don't involve different use lists that would fail this check
updated.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134792/new/

https://reviews.llvm.org/D134792



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