[llvm] d75980f - [X86] Fix missing HasX86_64 predicate

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Dec 11 02:27:18 PST 2022


Author: Simon Pilgrim
Date: 2022-12-11T10:27:03Z
New Revision: d75980f807f2e43b32b1936eaf7e7606afa888fd

URL: https://github.com/llvm/llvm-project/commit/d75980f807f2e43b32b1936eaf7e7606afa888fd
DIFF: https://github.com/llvm/llvm-project/commit/d75980f807f2e43b32b1936eaf7e7606afa888fd.diff

LOG: [X86] Fix missing HasX86_64 predicate

This was declared in FeatureX86_64 but never defined (we use the *64BitMode predicates for instruction defs - but now we need it for scheduler model defs).

Noticed while preparing to add Unsupported features handling to X86 scheduler models.

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86InstrInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 34f9d304a20b..0a45b7d585b2 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -1009,6 +1009,8 @@ def HasAMXBF16   : Predicate<"Subtarget->hasAMXBF16()">;
 def HasAMXINT8   : Predicate<"Subtarget->hasAMXINT8()">;
 def HasUINTR     : Predicate<"Subtarget->hasUINTR()">;
 def HasCRC32     : Predicate<"Subtarget->hasCRC32()">;
+
+def HasX86_64    : Predicate<"Subtarget->hasX86_64()">;
 def Not64BitMode : Predicate<"!Subtarget->is64Bit()">,
                              AssemblerPredicate<(all_of (not Is64Bit)), "Not 64-bit mode">;
 def In64BitMode  : Predicate<"Subtarget->is64Bit()">,


        


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