[compiler-rt] ba5edfd - Revert "[compiler-rt][hwasan] Let CheckAddressSized eventually call HandleTagMismatch on Fuchsia"
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sat Dec 10 05:36:04 PST 2022
Reminder to please always mention the reason for the revert in the
commit message.
On Sat, Dec 10, 2022 at 7:46 AM Gulfem Savrun Yeniceri via
llvm-commits <llvm-commits at lists.llvm.org> wrote:
>
>
> Author: Gulfem Savrun Yeniceri
> Date: 2022-12-10T04:44:26Z
> New Revision: ba5edfd386fcbb6bd06fe7fe499ca4d5949f1d6b
>
> URL: https://github.com/llvm/llvm-project/commit/ba5edfd386fcbb6bd06fe7fe499ca4d5949f1d6b
> DIFF: https://github.com/llvm/llvm-project/commit/ba5edfd386fcbb6bd06fe7fe499ca4d5949f1d6b.diff
>
> LOG: Revert "[compiler-rt][hwasan] Let CheckAddressSized eventually call HandleTagMismatch on Fuchsia"
>
> This reverts commit bcc4470bade15dbafa879973828a03c7e5194399.
>
> Added:
>
>
> Modified:
> compiler-rt/lib/hwasan/hwasan_checks.h
>
> Removed:
> compiler-rt/lib/hwasan/hwasan_registers.h
>
>
> ################################################################################
> diff --git a/compiler-rt/lib/hwasan/hwasan_checks.h b/compiler-rt/lib/hwasan/hwasan_checks.h
> index 514d351cf7d7..b0b37d7a2e2b 100644
> --- a/compiler-rt/lib/hwasan/hwasan_checks.h
> +++ b/compiler-rt/lib/hwasan/hwasan_checks.h
> @@ -15,49 +15,17 @@
>
> #include "hwasan_allocator.h"
> #include "hwasan_mapping.h"
> -#include "hwasan_registers.h"
> #include "sanitizer_common/sanitizer_common.h"
>
> namespace __hwasan {
> -
> -enum class ErrorAction { Abort, Recover };
> -enum class AccessType { Load, Store };
> -
> -// Used when the access size is known.
> -constexpr unsigned SigTrapEncoding(ErrorAction EA, AccessType AT,
> - unsigned LogSize) {
> - return 0x20 * (EA == ErrorAction::Recover) +
> - 0x10 * (AT == AccessType::Store) + LogSize;
> -}
> -
> -// Used when the access size varies at runtime.
> -constexpr unsigned SigTrapEncoding(ErrorAction EA, AccessType AT) {
> - return SigTrapEncoding(EA, AT, 0xf);
> -}
> -
> -template <ErrorAction EA, AccessType AT, size_t LogSize>
> +template <unsigned X>
> __attribute__((always_inline)) static void SigTrap(uptr p) {
> - // Other platforms like linux can use signals for intercepting an exception
> - // and dispatching to HandleTagMismatch. The fuchsias implementation doesn't
> - // use signals so we can call it here directly instead.
> -#if CAN_GET_REGISTERS && SANITIZER_FUCHSIA
> - auto regs = GetRegisters();
> - size_t size = 2 << LogSize;
> - AccessInfo access_info = {
> - .addr = p,
> - .size = size,
> - .is_store = AT == AccessType::Store,
> - .is_load = AT == AccessType::Load,
> - .recover = EA == ErrorAction::Recover,
> - };
> - HandleTagMismatch(access_info, (uptr)__builtin_return_address(0),
> - (uptr)__builtin_frame_address(0), /*uc=*/nullptr, regs.x);
> -#elif defined(__aarch64__)
> +#if defined(__aarch64__)
> (void)p;
> // 0x900 is added to do not interfere with the kernel use of lower values of
> // brk immediate.
> register uptr x0 asm("x0") = p;
> - asm("brk %1\n\t" ::"r"(x0), "n"(0x900 + SigTrapEncoding(EA, AT, LogSize)));
> + asm("brk %1\n\t" ::"r"(x0), "n"(0x900 + X));
> #elif defined(__x86_64__)
> // INT3 + NOP DWORD ptr [EAX + X] to pass X to our signal handler, 5 bytes
> // total. The pointer is passed via rdi.
> @@ -66,7 +34,7 @@ __attribute__((always_inline)) static void SigTrap(uptr p) {
> //
> diff erent nop command, the three bytes one).
> asm volatile(
> "int3\n"
> - "nopl %c0(%%rax)\n" ::"n"(0x40 + SigTrapEncoding(EA, AT, LogSize)),
> + "nopl %c0(%%rax)\n" ::"n"(0x40 + X),
> "D"(p));
> #elif SANITIZER_RISCV64
> // Put pointer into x10
> @@ -76,7 +44,7 @@ __attribute__((always_inline)) static void SigTrap(uptr p) {
> asm volatile(
> "ebreak\n"
> "addiw x0, x0, %1\n" ::"r"(x10),
> - "I"(0x40 + SigTrapEncoding(EA, AT, LogSize)));
> + "I"(0x40 + X));
> #else
> // FIXME: not always sigill.
> __builtin_trap();
> @@ -85,31 +53,17 @@ __attribute__((always_inline)) static void SigTrap(uptr p) {
> }
>
> // Version with access size which is not power of 2
> -template <ErrorAction EA, AccessType AT>
> +template <unsigned X>
> __attribute__((always_inline)) static void SigTrap(uptr p, uptr size) {
> - // Other platforms like linux can use signals for intercepting an exception
> - // and dispatching to HandleTagMismatch. The fuchsias implementation doesn't
> - // use signals so we can call it here directly instead.
> -#if CAN_GET_REGISTERS && SANITIZER_FUCHSIA
> - auto regs = GetRegisters();
> - AccessInfo access_info = {
> - .addr = p,
> - .size = size,
> - .is_store = AT == AccessType::Store,
> - .is_load = AT == AccessType::Load,
> - .recover = EA == ErrorAction::Recover,
> - };
> - HandleTagMismatch(access_info, (uptr)__builtin_return_address(0),
> - (uptr)__builtin_frame_address(0), /*uc=*/nullptr, regs.x);
> -#elif defined(__aarch64__)
> +#if defined(__aarch64__)
> register uptr x0 asm("x0") = p;
> register uptr x1 asm("x1") = size;
> - asm("brk %2\n\t" ::"r"(x0), "r"(x1), "n"(0x900 + SigTrapEncoding(EA, AT)));
> + asm("brk %2\n\t" ::"r"(x0), "r"(x1), "n"(0x900 + X));
> #elif defined(__x86_64__)
> // Size is stored in rsi.
> asm volatile(
> "int3\n"
> - "nopl %c0(%%rax)\n" ::"n"(0x40 + SigTrapEncoding(EA, AT)),
> + "nopl %c0(%%rax)\n" ::"n"(0x40 + X),
> "D"(p), "S"(size));
> #elif SANITIZER_RISCV64
> // Put access size into x11
> @@ -118,7 +72,7 @@ __attribute__((always_inline)) static void SigTrap(uptr p, uptr size) {
> asm volatile(
> "ebreak\n"
> "addiw x0, x0, %2\n" ::"r"(x10),
> - "r"(x11), "I"(0x40 + SigTrapEncoding(EA, AT)));
> + "r"(x11), "I"(0x40 + X));
> #else
> __builtin_trap();
> #endif
> @@ -140,6 +94,9 @@ __attribute__((always_inline, nodebug)) static bool PossiblyShortTagMatches(
> return *(u8 *)(ptr | (kShadowAlignment - 1)) == ptr_tag;
> }
>
> +enum class ErrorAction { Abort, Recover };
> +enum class AccessType { Load, Store };
> +
> template <ErrorAction EA, AccessType AT, unsigned LogSize>
> __attribute__((always_inline, nodebug)) static void CheckAddress(uptr p) {
> if (!InTaggableRegion(p))
> @@ -147,7 +104,8 @@ __attribute__((always_inline, nodebug)) static void CheckAddress(uptr p) {
> uptr ptr_raw = p & ~kAddressTagMask;
> tag_t mem_tag = *(tag_t *)MemToShadow(ptr_raw);
> if (UNLIKELY(!PossiblyShortTagMatches(mem_tag, p, 1 << LogSize))) {
> - SigTrap<EA, AT, LogSize>(p);
> + SigTrap<0x20 * (EA == ErrorAction::Recover) +
> + 0x10 * (AT == AccessType::Store) + LogSize>(p);
> if (EA == ErrorAction::Abort)
> __builtin_unreachable();
> }
> @@ -164,7 +122,8 @@ __attribute__((always_inline, nodebug)) static void CheckAddressSized(uptr p,
> tag_t *shadow_last = (tag_t *)MemToShadow(ptr_raw + sz);
> for (tag_t *t = shadow_first; t < shadow_last; ++t)
> if (UNLIKELY(ptr_tag != *t)) {
> - SigTrap<EA, AT>(p, sz);
> + SigTrap<0x20 * (EA == ErrorAction::Recover) +
> + 0x10 * (AT == AccessType::Store) + 0xf>(p, sz);
> if (EA == ErrorAction::Abort)
> __builtin_unreachable();
> }
> @@ -173,7 +132,8 @@ __attribute__((always_inline, nodebug)) static void CheckAddressSized(uptr p,
> if (UNLIKELY(tail_sz != 0 &&
> !PossiblyShortTagMatches(
> *shadow_last, end & ~(kShadowAlignment - 1), tail_sz))) {
> - SigTrap<EA, AT>(p, sz);
> + SigTrap<0x20 * (EA == ErrorAction::Recover) +
> + 0x10 * (AT == AccessType::Store) + 0xf>(p, sz);
> if (EA == ErrorAction::Abort)
> __builtin_unreachable();
> }
>
> diff --git a/compiler-rt/lib/hwasan/hwasan_registers.h b/compiler-rt/lib/hwasan/hwasan_registers.h
> deleted file mode 100644
> index f26ce5db0db6..000000000000
> --- a/compiler-rt/lib/hwasan/hwasan_registers.h
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -//===-- hwasan_registers.h --------------------------------------*- C++ -*-===//
> -//
> -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
> -// See https://llvm.org/LICENSE.txt for license information.
> -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
> -//
> -//===----------------------------------------------------------------------===//
> -//
> -// This describes the register state retrieved by hwasan when error reporting.
> -//
> -//===----------------------------------------------------------------------===//
> -
> -#ifndef HWASAN_REGISTERS_H
> -#define HWASAN_REGISTERS_H
> -
> -#include "sanitizer_common/sanitizer_common.h"
> -#include "sanitizer_common/sanitizer_platform.h"
> -
> -#if defined(__aarch64__)
> -
> -# define CAN_GET_REGISTERS 1
> -
> -struct Registers {
> - uptr x[32];
> -};
> -
> -__attribute__((always_inline)) static Registers GetRegisters() {
> - Registers regs;
> - __asm__ volatile(
> - "stp x0, x1, [%1, #(8 * 0)]\n"
> - "stp x2, x3, [%1, #(8 * 2)]\n"
> - "stp x4, x5, [%1, #(8 * 4)]\n"
> - "stp x6, x7, [%1, #(8 * 6)]\n"
> - "stp x8, x9, [%1, #(8 * 8)]\n"
> - "stp x10, x11, [%1, #(8 * 10)]\n"
> - "stp x12, x13, [%1, #(8 * 12)]\n"
> - "stp x14, x15, [%1, #(8 * 14)]\n"
> - "stp x16, x17, [%1, #(8 * 16)]\n"
> - "stp x18, x19, [%1, #(8 * 18)]\n"
> - "stp x20, x21, [%1, #(8 * 20)]\n"
> - "stp x22, x23, [%1, #(8 * 22)]\n"
> - "stp x24, x25, [%1, #(8 * 24)]\n"
> - "stp x26, x27, [%1, #(8 * 26)]\n"
> - "stp x28, x29, [%1, #(8 * 28)]\n"
> - : "=m"(regs)
> - : "r"(regs.x));
> - regs.x[30] = reinterpret_cast<uintptr_t>(__builtin_return_address(0));
> - regs.x[31] = reinterpret_cast<uintptr_t>(__builtin_frame_address(0));
> - return regs;
> -}
> -
> -#else
> -# define CAN_GET_REGISTERS 0
> -#endif
> -
> -#endif // HWASAN_REGISTERS_H
>
>
>
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