[llvm] 142e380 - [OpenMP][FIX] Do not use reachability reasoning in parallel contexts

[Johannes Doerfert via llvm-commits]

Author: Johannes Doerfert
Date: 2022-12-09T14:27:55-08:00
New Revision: 142e38007d956c20c94d4c379f8c66152c99d437

URL: https://github.com/llvm/llvm-project/commit/142e38007d956c20c94d4c379f8c66152c99d437
DIFF: https://github.com/llvm/llvm-project/commit/142e38007d956c20c94d4c379f8c66152c99d437.diff

LOG: [OpenMP][FIX] Do not use reachability reasoning in parallel contexts

Similar to dominance reasoning, we cannot use CFG reachability if the
instructions might be executed by different threads. A follow up will
improve our sensitivity for situations when it is OK to use graph
reasoning.

Added: 
    

Modified: 
    llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index db48f3926c0c7..047ee7a2fc1cb 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -1147,7 +1147,7 @@ struct AAPointerInfoImpl
     // succeeded for all or not.
     unsigned NumInterferingAccesses = InterferingAccesses.size();
     for (auto &It : InterferingAccesses) {
-      if (NumInterferingAccesses > MaxInterferingAccesses ||
+      if (!CanUseCFGResoning || NumInterferingAccesses > MaxInterferingAccesses ||
           !CanSkipAccess(*It.first, It.second)) {
         if (!UserCB(*It.first, It.second))
           return false;

diff  --git a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
index a95c0621a3f01..6a1c527b3c3ff 100644
--- a/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
+++ b/llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
@@ -1845,8 +1845,11 @@ define i32 @static_global_simplifiable_4(i32 %cnd) {
 ; CHECK-LABEL: define {{[^@]+}}@static_global_simplifiable_4
 ; CHECK-SAME: (i32 [[CND:%.*]]) {
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    store i32 1, i32* @Flag2, align 4, !tbaa [[TBAA3]]
 ; CHECK-NEXT:    call void @sync()
-; CHECK-NEXT:    ret i32 1
+; CHECK-NEXT:    [[I:%.*]] = load i32, i32* @Flag2, align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT:    store i32 2, i32* @Flag2, align 4, !tbaa [[TBAA3]]
+; CHECK-NEXT:    ret i32 [[I]]
 ;
 entry:
   store i32 1, i32* @Flag2, align 4, !tbaa !3