[PATCH] D139732: [AMDGPU] Add pass to rewrite partially used virtual superregisters after RenameIndependentSubregs pass with registers of minimal size (WIP)
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 9 14:08:46 PST 2022
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp:119-120
+ auto *NewRC = TRI->getSubRegisterClass(RC, MatchSR);
+ if (NewRC && NewRC->isAllocatable())
+ return NewRC;
+ }
----------------
getAllocatableClass
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139732/new/
https://reviews.llvm.org/D139732
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