[PATCH] D139422: [AMDGPU] Accelerate SIRegisterInfo::getPhysRegClass
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 9 06:57:53 PST 2022
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:1433
auto RC =
- TRI.getPhysRegClass(cast<RegisterSDNode>(Val.getOperand(1))->getReg());
+ TRI.getPhysRegBaseClass(cast<RegisterSDNode>(Val.getOperand(1))->getReg());
return RC && TRI.isSGPRClass(RC);
----------------
This will sometimes call getPhysRegBaseClass on a virtual register, which I think should be disallowed.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139422/new/
https://reviews.llvm.org/D139422
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