[PATCH] D139710: [AMDGPU] MachineScheduler: schedule execution metric added for the UnclusteredHighRPStage

[Alexander via Phabricator via llvm-commits]

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Since the divergence-driven ISel was fully enabled we have more VGPRs available.

  MachineScheduler trying to take advantage of that bumps up the occupancy sacrificing
  the hiding of memory access latency.  This really spoils the initially good schedule.
  A new metric that reflects the latency hiding quality of the schedule has been created
  to make it to balance between occupancy and latency. The metric is based on the latency
  model which computes the bubble to working cycles ratio. Then we use this ratio to decide
  if the higher occupancy schedule is profitable as follows:
  
      Profit = NewOccupancy/OldOccupancy * OldMetric/NewMetric


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139710

Files:
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
  llvm/test/CodeGen/AMDGPU/load-global-i16.ll
  llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll

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