[PATCH] D139609: [AArch64][DAGCombiner] fold instruction BIC from ISD::AND

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 updated this revision to Diff 481530.
bcl5980 added a comment.

add shiftreg selection for bic


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139609/new/

https://reviews.llvm.org/D139609

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/logical-op-with-not.ll
  llvm/test/CodeGen/AArch64/shiftregister-from-and.ll

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