[PATCH] D139691: [PowerPC] add a peephole to remove redundant swap instructions after vector splats on P8

[Ting Wang via Phabricator via llvm-commits]

tingwang created this revision.
tingwang added reviewers: shchenz, nemanjai, PowerPC.
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Vector store on P8 <https://reviews.llvm.org/P8> little endian will have swap instruction added before the store in PPCISelLowring. If the vector is generated by splat, the swap instruction can be eliminated.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139691

Files:
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
  llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/load-and-splat.ll


Index: llvm/test/CodeGen/PowerPC/load-and-splat.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/load-and-splat.ll
+++ llvm/test/CodeGen/PowerPC/load-and-splat.ll
@@ -84,7 +84,6 @@
 ; P8-NEXT:    addi r4, r4, 12
 ; P8-NEXT:    lfiwzx f0, 0, r4
 ; P8-NEXT:    xxspltw vs0, vs0, 1
-; P8-NEXT:    xxswapd vs0, vs0
 ; P8-NEXT:    stxvd2x vs0, 0, r3
 ; P8-NEXT:    blr
 ;
@@ -141,7 +140,6 @@
 ; P8-NEXT:    addi r4, r4, 12
 ; P8-NEXT:    lfiwzx f0, 0, r4
 ; P8-NEXT:    xxspltw vs0, vs0, 1
-; P8-NEXT:    xxswapd vs0, vs0
 ; P8-NEXT:    stxvd2x vs0, 0, r3
 ; P8-NEXT:    blr
 ;
Index: llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
+++ llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
@@ -1196,8 +1196,7 @@
 ; CHECK-P7-NEXT:    lvx v3, 0, r3
 ; CHECK-P7-NEXT:    vperm v2, v3, v3, v2
 ; CHECK-P7-NEXT:    vspltb v2, v2, 15
-; CHECK-P7-NEXT:    xxswapd vs0, v2
-; CHECK-P7-NEXT:    stxvd2x vs0, 0, r3
+; CHECK-P7-NEXT:    stxvd2x v2, 0, r3
 ; CHECK-P7-NEXT:    blr
 ;
 ; P8-AIX-LABEL: testByteSplat:
Index: llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
+++ llvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
@@ -47,13 +47,11 @@
 ; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    mullw 4, 4, 5
 ; CHECK-NEXT:    vsplth 2, 2, 3
-; CHECK-NEXT:    xxswapd 0, 34
+; CHECK-NEXT:    stxvd2x 34, 0, 3
 ; CHECK-NEXT:    neg 4, 4
 ; CHECK-NEXT:    mtvsrd 35, 4
-; CHECK-NEXT:    stxvd2x 0, 0, 3
 ; CHECK-NEXT:    vsplth 3, 3, 3
-; CHECK-NEXT:    xxswapd 1, 35
-; CHECK-NEXT:    stxvd2x 1, 0, 3
+; CHECK-NEXT:    stxvd2x 35, 0, 3
 bb:
   br i1 undef, label %bb22, label %bb3
 
Index: llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
+++ llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
@@ -14,7 +14,6 @@
 ; CHECK-P8:    lfiwzx f0, 0, r3
 ; CHECK-P8:    ld r4, .LC0 at toc@l(r4)
 ; CHECK-P8:    xxspltw vs0, vs0, 1
-; CHECK-P8:    xxswapd vs0, vs0
 ; CHECK-P8;    stxvd2x vs0, 0, r4
 ; CHECK-P8:    lis r4, 1024
 ; CHECK-P8:    lfiwax f0, 0, r3
Index: llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -644,6 +644,18 @@
           DefMI->getOperand(0).setReg(MI.getOperand(0).getReg());
           LLVM_DEBUG(dbgs() << "Removing redundant splat: ");
           LLVM_DEBUG(MI.dump());
+        } else if (Immed == 2 &&
+                   (DefOpc == PPC::VSPLTB || DefOpc == PPC::VSPLTH ||
+                    DefOpc == PPC::VSPLTW || DefOpc == PPC::XXSPLTW)) {
+          // Swap of various vector splats, convert to copy.
+          ToErase = &MI;
+          Simplified = true;
+          LLVM_DEBUG(dbgs() << "Optimizing swap(vsplt[b|h|w]|xxspltw) => "
+                               "copy(vsplt[b|h|w]|xxspltw): ");
+          LLVM_DEBUG(MI.dump());
+          BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(PPC::COPY),
+                  MI.getOperand(0).getReg())
+              .add(MI.getOperand(1));
         }
         break;
       }


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