[PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

I sat down yesterday to prototype the approach I had suggested, and basically end up convincing myself I was wrong.  Not from a theoretical standpoint on the vsetvli toggles, but from the fact we really do want to change instruction selection in some cases as well.

In that vein, I wrote up a small patch series (D139656 <https://reviews.llvm.org/D139656>) which tries to work towards this objective, and apply the same logic more broadly.  I also landed two small changes to InsertVSETVLI to better handle vmv.s.x idioms exposed by these patches.  I'm curious what you think of those.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D137530/new/

https://reviews.llvm.org/D137530