[PATCH] D138869: [Docs][RFC] Add AMDGPU LLVM Extensions for Heterogeneous Debugging

[Stephen Tozer via Phabricator via llvm-commits]

StephenTozer added inline comments.


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Comment at: llvm/docs/AMDGPULLVMExtensionsForHeterogeneousDebugging.rst:2645-2649
+   Make sure the non-SSA MIR form works with def/kill scheme, and additionally
+   confirm why we do not seem to need the work upstream that is trying to move
+   to referring to an instruction rather than a register? See `[llvm-dev] [RFC]
+   DebugInfo: A different way of specifying variable locations post-isel
+   <https://lists.llvm.org/pipermail/llvm-dev/2020-February/139440.html>`__.
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I'm unsure what this part means - is it implying that this work gets equivalent results to the instruction referencing implementation and you're not sure why that is the case? I would have thought that in principal, the MIR form of this work would ideally use instruction references wherever possible to prevent lifetime ranges that should be non-overlapping from becoming awkwardly tangled up during CodeGen.


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https://reviews.llvm.org/D138869