[PATCH] D138887: [SPARC] Mark the %g0 register as constant & use it to materialize zeros
Koakuma via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 8 02:51:46 PST 2022
koakuma updated this revision to Diff 481221.
koakuma added a comment.
I noticed that in the "Zero register pair" pattern, LLVM really does not like using an explicit copying from `%g0` to set the lower half, even when bitcasted into `i32` as in the previous version of the patch, so I generalized the pattern to match the materialization of any `(0, X)` register pair. This works since we really only care about preventing LLVM from selecting a register pair copy (i.e. `COPY G0_G1`) during the filling of the upper part.
This should fix the two problematic testcases without affecting the rest.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D138887/new/
https://reviews.llvm.org/D138887
Files:
llvm/lib/Target/Sparc/SparcInstr64Bit.td
llvm/lib/Target/Sparc/SparcInstrInfo.td
llvm/lib/Target/Sparc/SparcRegisterInfo.td
llvm/test/CodeGen/SPARC/64bit.ll
llvm/test/CodeGen/SPARC/64cond.ll
llvm/test/CodeGen/SPARC/atomics.ll
llvm/test/CodeGen/SPARC/bigreturn.ll
llvm/test/CodeGen/SPARC/cttz.ll
llvm/test/CodeGen/SPARC/float-constants.ll
llvm/test/CodeGen/SPARC/fshl.ll
llvm/test/CodeGen/SPARC/inlineasm.ll
llvm/test/CodeGen/SPARC/missinglabel.ll
llvm/test/CodeGen/SPARC/smulo-128-legalisation-lowering.ll
llvm/test/CodeGen/SPARC/tailcall.ll
llvm/test/CodeGen/SPARC/umulo-128-legalisation-lowering.ll
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/sparc_generated_funcs.ll.generated.expected
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/sparc_generated_funcs.ll.nogenerated.expected
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