[llvm] 169ff55 - [Inline] Regenerate test checks (NFC)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 8 01:17:42 PST 2022


Author: Nikita Popov
Date: 2022-12-08T10:17:02+01:00
New Revision: 169ff554c11a4ef0d989e22e823324d7be399a7a

URL: https://github.com/llvm/llvm-project/commit/169ff554c11a4ef0d989e22e823324d7be399a7a
DIFF: https://github.com/llvm/llvm-project/commit/169ff554c11a4ef0d989e22e823324d7be399a7a.diff

LOG: [Inline] Regenerate test checks (NFC)

Don't use anon names, convert to opaque pointers and use
generated check lines.

Added: 
    

Modified: 
    llvm/test/Transforms/Inline/callbr.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/Inline/callbr.ll b/llvm/test/Transforms/Inline/callbr.ll
index e31f0380ceb9..160770051c36 100644
--- a/llvm/test/Transforms/Inline/callbr.ll
+++ b/llvm/test/Transforms/Inline/callbr.ll
@@ -1,55 +1,65 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -passes=inline -S < %s | FileCheck %s
 ; RUN: opt -passes='cgscc(inline)' -S < %s | FileCheck %s
 ; RUN: opt -passes='module-inline' -S < %s | FileCheck %s
 
-define dso_local i32 @main() #0 {
-  %1 = alloca i32, align 4
-  store i32 0, i32* %1, align 4
-  %2 = call i32 @t32(i32 0)
-  ret i32 %2
+define dso_local i32 @main() {
+; CHECK-LABEL: @main(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    [[I_I:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[I1_I:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    [[I:%.*]] = alloca i32, align 4
+; CHECK-NEXT:    store i32 0, ptr [[I]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 4, ptr [[I_I]])
+; CHECK-NEXT:    call void @llvm.lifetime.start.p0(i64 4, ptr [[I1_I]])
+; CHECK-NEXT:    store i32 0, ptr [[I1_I]], align 4
+; CHECK-NEXT:    [[I2_I:%.*]] = load i32, ptr [[I1_I]], align 4
+; CHECK-NEXT:    callbr void asm sideeffect "", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 [[I2_I]])
+; CHECK-NEXT:    to label [[BB3_I:%.*]] [label [[BB5_I:%.*]], label %bb4.i]
+; CHECK:       bb3.i:
+; CHECK-NEXT:    store i32 0, ptr [[I_I]], align 4
+; CHECK-NEXT:    br label [[T32_EXIT:%.*]]
+; CHECK:       bb4.i:
+; CHECK-NEXT:    store i32 1, ptr [[I_I]], align 4
+; CHECK-NEXT:    br label [[T32_EXIT]]
+; CHECK:       bb5.i:
+; CHECK-NEXT:    store i32 2, ptr [[I_I]], align 4
+; CHECK-NEXT:    br label [[T32_EXIT]]
+; CHECK:       t32.exit:
+; CHECK-NEXT:    [[I7_I:%.*]] = load i32, ptr [[I_I]], align 4
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 4, ptr [[I_I]])
+; CHECK-NEXT:    call void @llvm.lifetime.end.p0(i64 4, ptr [[I1_I]])
+; CHECK-NEXT:    ret i32 [[I7_I]]
+;
+bb:
+  %i = alloca i32, align 4
+  store i32 0, ptr %i, align 4
+  %i1 = call i32 @t32(i32 0)
+  ret i32 %i1
 }
 
-define internal i32 @t32(i32) #0 {
-  %2 = alloca i32, align 4
-  %3 = alloca i32, align 4
-  store i32 %0, i32* %3, align 4
-  %4 = load i32, i32* %3, align 4
-  callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %4) #1
-          to label %5 [label %7, label %6]
+define internal i32 @t32(i32 %arg) {
+bb:
+  %i = alloca i32, align 4
+  %i1 = alloca i32, align 4
+  store i32 %arg, ptr %i1, align 4
+  %i2 = load i32, ptr %i1, align 4
+  callbr void asm sideeffect "", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %i2)
+  to label %bb3 [label %bb5, label %bb4]
 
-; <label>:5:                                      ; preds = %1
-  store i32 0, i32* %2, align 4
-  br label %8
+bb3:                                              ; preds = %bb
+  store i32 0, ptr %i, align 4
+  br label %bb6
 
-; <label>:6:                                      ; preds = %1
-  store i32 1, i32* %2, align 4
-  br label %8
+bb4:                                              ; preds = %bb
+  store i32 1, ptr %i, align 4
+  br label %bb6
 
-; <label>:7:                                      ; preds = %1
-  store i32 2, i32* %2, align 4
-  br label %8
+bb5:                                              ; preds = %bb
+  store i32 2, ptr %i, align 4
+  br label %bb6
 
-; <label>:8:                                      ; preds = %7, %6, %5
-  %9 = load i32, i32* %2, align 4
-  ret i32 %9
+bb6:                                              ; preds = %bb5, %bb4, %bb3
+  %i7 = load i32, ptr %i, align 4
+  ret i32 %i7
 }
-
-; Check that @t32 no longer exists after inlining, as it has now been inlined
-; into @main.
-
-; CHECK-NOT: @t32
-; CHECK: define dso_local i32 @main
-; CHECK: callbr void asm sideeffect "testl $0, $0; jne ${1:l};", "r,!i,!i,~{dirflag},~{fpsr},~{flags}"(i32 %6)
-; CHECK: to label %7 [label %9, label %8]
-; CHECK: 7:
-; CHECK-NEXT: store i32 0, i32* %1, align 4
-; CHECK-NEXT: br label %t32.exit
-; CHECK: 8:
-; CHECK-NEXT: store i32 1, i32* %1, align 4
-; CHECK-NEXT: br label %t32.exit
-; CHECK: 9:
-; CHECK-NEXT: store i32 2, i32* %1, align 4
-; CHECK-NEXT: br label %t32.exit
-; CHECK: t32.exit:
-; CHECK-NEXT: %10 = load i32, i32* %1, align 4
-; CHECK: ret i32 %10


        


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