[PATCH] D139492: [PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll
Ting Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 7 17:17:06 PST 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG140a83e32f64: [PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll (authored by tingwang).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139492/new/
https://reviews.llvm.org/D139492
Files:
llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
Index: llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
===================================================================
--- llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
+++ llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
@@ -9,11 +9,11 @@
; CHECK-NEXT: xxlxor v2, v2, v2
; CHECK-NEXT: xxlxor vs0, vs0, vs0
; CHECK-NEXT: xxlor vs3, v2, v2
-; CHECK-NEXT: stxv vs1, 0(0)
+; CHECK-NEXT: stxv vs0, 0(0)
dmblvi_entry:
%0 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> zeroinitializer, <16 x i8> undef, <16 x i8> undef, <16 x i8> zeroinitializer)
%1 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %0)
- %2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 2
+ %2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 3
store <16 x i8> %2, ptr null, align 1
unreachable
}
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