[llvm] 140a83e - [PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll

[Ting Wang via llvm-commits]

Author: Ting Wang
Date: 2022-12-07T20:16:12-05:00
New Revision: 140a83e32f64d0fdd0d65a723100b9090bc93bb3

URL: https://github.com/llvm/llvm-project/commit/140a83e32f64d0fdd0d65a723100b9090bc93bb3
DIFF: https://github.com/llvm/llvm-project/commit/140a83e32f64d0fdd0d65a723100b9090bc93bb3.diff

LOG: [PowerPC][NFC] Test case update on ppc64-acc-regalloc-bugfix.ll

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D139492

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll b/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
index 23e104f59ee24..0146dc8a1c163 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc-bugfix.ll
@@ -9,11 +9,11 @@ define void @copy_novsrp() local_unnamed_addr {
 ; CHECK-NEXT:    xxlxor v2, v2, v2
 ; CHECK-NEXT:    xxlxor vs0, vs0, vs0
 ; CHECK-NEXT:    xxlor vs3, v2, v2
-; CHECK-NEXT:    stxv vs1, 0(0)
+; CHECK-NEXT:    stxv vs0, 0(0)
 dmblvi_entry:
   %0 = tail call <512 x i1> @llvm.ppc.mma.assemble.acc(<16 x i8> zeroinitializer, <16 x i8> undef, <16 x i8> undef, <16 x i8> zeroinitializer)
   %1 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> %0)
-  %2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 2
+  %2 = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %1, 3
   store <16 x i8> %2, ptr null, align 1
   unreachable
 }