[PATCH] D139565: [IR] add new callbrpad instruction

[James Y Knight via Phabricator via llvm-commits]

jyknight added a comment.

I haven't fully caught up here, but, riffing on efriedma's comments --

Are there IR-level optimizations that will cause a problem without there being separate SSA values here? Or would it work to have a codegen pipeline pre-isel lowering that adds the callbrpad instructions as necessary? That is, make this an internal implementation detail of the IR->ISel lowering -- even though we'd actually be adding at the IR level first, for internal implementability reasons.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D139565/new/

https://reviews.llvm.org/D139565