[PATCH] D139565: [IR] add new callbrpad instruction

[Nick Desaulniers via Phabricator via llvm-commits]

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In order to properly support outputs along indirect edges of callbr, it
would be helpful to have distinct SSA values to refer to so that during
instruction selection, we can mark outputs that might come from specific
physregs as live-in and place copies to virtregs.

Please see the corresponding RFC accompanying this patch.

Link: https://github.com/llvm/llvm-project/issues/53562
Link: https://discourse.llvm.org/t/rfc-syncing-asm-goto-with-outputs-with-gcc/65453
Link: https://discourse.llvm.org/t/rfc-asm-goto-with-output-constraints/52354/4


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139565

Files:
  llvm/include/llvm-c/Core.h
  llvm/include/llvm/AsmParser/LLParser.h
  llvm/include/llvm/AsmParser/LLToken.h
  llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
  llvm/include/llvm/IR/IRBuilder.h
  llvm/include/llvm/IR/InstVisitor.h
  llvm/include/llvm/IR/Instruction.def
  llvm/include/llvm/IR/Instruction.h
  llvm/include/llvm/IR/Instructions.h
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/AsmParser/LLParser.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/CodeGen/TargetLoweringBase.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/Dominators.cpp
  llvm/lib/IR/Instruction.cpp
  llvm/lib/IR/Verifier.cpp
  llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
  llvm/test/Transforms/SimplifyCFG/callbr-destinations.ll
  llvm/test/Verifier/callbr.ll
  llvm/utils/vim/syntax/llvm.vim

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