[PATCH] D137530: [RISCV] Splat scalar to be of length VL instead of 1 for reductions

[Philip Reames via Phabricator via llvm-commits]

reames added a comment.

I'm looking at your test changes - not the code - and it really seems like the sole benefit of this here is vsetvli insertion.  I'd default to expecting this to belong inside RISCVInsertVSETVLI.cpp not during ISEL.

>From what I can tell glancing at the test deltas, you're effectively proposing the following rules:

- A scalar insert w/TA demands the "non-zeroness" of the AVL.
- A splat or broadcast load w/TA demands the an equal or greater AVL (with the same LMUL).

>From what I can tell, we have no reason to prefer the v.x/v.i/v.f form over the s.x/s.f forms.  The changes in your diff appear to be an artifact of how you implemented the above rules, not a benefit on their own.  Unless you disagree with this, I would ask that you rework the patch and patch description to make that obvious.

Worth noting is that even if you decide to keep this in ISEL, there's nothing about the rules above which are specific to reductions.


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https://reviews.llvm.org/D137530