[PATCH] D137140: [SDAG] Allow scalable vectors in ComputeKnownBits

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Can you check if it helps to add an implementation of isTargetCanonicalConstantNode for hexagon? It looks like CONCAT is needed, and maybe some other nodes like bitcasts.

  bool HexagonTargetLowering::isTargetCanonicalConstantNode(SDValue Op) const {
    return Op.getOpcode() == ISD::CONCAT_VECTORS ||
           TargetLowering::isTargetCanonicalConstantNode(Op);
  }


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D137140/new/

https://reviews.llvm.org/D137140