[PATCH] D139511: [RISCV] Remove pseudos for whole register load, store, and move.

Kito Cheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 6 23:53:56 PST 2022


kito-cheng added a comment.

LGTM, that's not only for fix a potential issue, but slightly simplify the code (remove few pseudos).

> The pseudos we incorrectly going through code in RISCVMCInstLower
> that converted LMUL>1 register classes to LMUL1 register class.

For other reviewer, here is the location we did this:

https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp#L188


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139511/new/

https://reviews.llvm.org/D139511



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