[PATCH] D139491: [PowerPC] remove XXSWAPD after load from CP which is a splat value

[Ting Wang via Phabricator via llvm-commits]

tingwang created this revision.
tingwang added reviewers: shchenz, nemanjai, PowerPC.
tingwang added a project: LLVM.
Herald added subscribers: kbarton, hiraditya.
Herald added a project: All.
tingwang requested review of this revision.
Herald added a subscriber: llvm-commits.

If the value from constant-pool is a splat value of vector type, do not need swap after load from constant-pool.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139491

Files:
  llvm/lib/Target/PowerPC/PPCInstrInfo.h
  llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
  llvm/test/CodeGen/PowerPC/build-vector-tests.ll
  llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
  llvm/test/CodeGen/PowerPC/combine-fneg.ll
  llvm/test/CodeGen/PowerPC/fma-combine.ll
  llvm/test/CodeGen/PowerPC/fp-classify.ll
  llvm/test/CodeGen/PowerPC/memset-tail.ll
  llvm/test/CodeGen/PowerPC/mul-const-vector.ll
  llvm/test/CodeGen/PowerPC/pr25080.ll
  llvm/test/CodeGen/PowerPC/pr47891.ll
  llvm/test/CodeGen/PowerPC/recipest.ll
  llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll
  llvm/test/CodeGen/PowerPC/sat-add.ll
  llvm/test/CodeGen/PowerPC/signbit-shift.ll
  llvm/test/CodeGen/PowerPC/srem-seteq-illegal-types.ll
  llvm/test/CodeGen/PowerPC/vec-itofp.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
  llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
  llvm/test/CodeGen/PowerPC/vector-extend-sign.ll
  llvm/test/CodeGen/PowerPC/vsx.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D139491.480704.patch
Type: text/x-patch
Size: 45559 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221207/1f4b4609/attachment-0001.bin>