[PATCH] D139128: [AMDGPU] G_IS_FPCLASS lower() support for IEEE fp types

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 6 13:19:29 PST 2022


arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.


================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll:414-434
+; GFX7SELDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX7SELDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
+; GFX7SELDAG-NEXT:    s_movk_i32 s6, 0x7800
+; GFX7SELDAG-NEXT:    v_bfe_i32 v1, v0, 0, 16
+; GFX7SELDAG-NEXT:    v_and_b32_e32 v0, 0x7fff, v0
+; GFX7SELDAG-NEXT:    v_add_i32_e32 v0, vcc, 0xfffffc00, v0
+; GFX7SELDAG-NEXT:    v_and_b32_e32 v0, 0xffff, v0
----------------
We really need to fix this ABI discrepancy for i16/f16 for 16-bit-insts targets 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D139128/new/

https://reviews.llvm.org/D139128



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