[PATCH] D139443: [AArch64] Support SLC in ACLE prefetch intrinsics

[Sam Elliott via Phabricator via llvm-commits]

lenary created this revision.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
lenary requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

This change:

- Modifies the ACLE code to allow the new SLC value (3) for the prefetch target.

- Introduces a new intrinsic, @llvm.aarch64.prefetch which matches the PRFM family instructions much more closely, and can represent all values for the PRFM immediate.

  The target-independent @llvm.prefetch intrinsic does not have enough information for us to be able to lower to it from the ACLE intrinsics correctly.

- Lowers the acle calls to the new intrinsic on aarch64 (the ARM lowering is unchanged).

- Implements code generation for the new intrinsic in both SelectionDAG and GlobalISel. We specifically choose to continue to support lowering the target-independent @llvm.prefetch intrinsic so that other frontends can continue to use it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139443

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/arm_acle.c
  clang/test/CodeGen/builtins-arm64.c
  clang/test/Sema/builtins-arm64.c
  llvm/include/llvm/IR/IntrinsicsAArch64.td
  llvm/lib/IR/Verifier.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/arm64-prefetch-new.ll

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