[llvm] b9f3977 - [AMDGPU] Add MC tests for s_endpgm's optional immediate operand
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 6 09:08:16 PST 2022
Author: Jay Foad
Date: 2022-12-06T17:04:50Z
New Revision: b9f3977b26b2cb9452cda98cb4664b6910b2003a
URL: https://github.com/llvm/llvm-project/commit/b9f3977b26b2cb9452cda98cb4664b6910b2003a
DIFF: https://github.com/llvm/llvm-project/commit/b9f3977b26b2cb9452cda98cb4664b6910b2003a.diff
LOG: [AMDGPU] Add MC tests for s_endpgm's optional immediate operand
Differential Revision: https://reviews.llvm.org/D139438
Added:
Modified:
llvm/test/MC/AMDGPU/gfx10_asm_sop.s
llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
llvm/test/MC/AMDGPU/sopp.s
llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
Removed:
################################################################################
diff --git a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
index 8bd19beb38ee4..80c5d1dd24d01 100644
--- a/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
+++ b/llvm/test/MC/AMDGPU/gfx10_asm_sop.s
@@ -9816,6 +9816,12 @@ s_nop 0xc1d1
s_endpgm
// GFX10: encoding: [0x00,0x00,0x81,0xbf]
+s_endpgm 1
+// GFX10: encoding: [0x01,0x00,0x81,0xbf]
+
+s_endpgm 65535
+// GFX10: encoding: [0xff,0xff,0x81,0xbf]
+
s_branch 0x0
// GFX10: encoding: [0x00,0x00,0x82,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
index a5573a08acca6..aac0c74887a4c 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_sopp.s
@@ -215,6 +215,12 @@ s_nop 0xc1d1
s_endpgm
// GFX11: s_endpgm ; encoding: [0x00,0x00,0xb0,0xbf]
+s_endpgm 1
+// GFX11: s_endpgm 1 ; encoding: [0x01,0x00,0xb0,0xbf]
+
+s_endpgm 65535
+// GFX11: s_endpgm 65535 ; encoding: [0xff,0xff,0xb0,0xbf]
+
s_branch 0x0
// GFX11: s_branch 0 ; encoding: [0x00,0x00,0xa0,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
index 7e66c0cfeadb3..2cea9ec5695c2 100644
--- a/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx7_asm_sopp.s
@@ -9,6 +9,12 @@ s_nop 0xc1d1
s_endpgm
// CHECK: [0x00,0x00,0x81,0xbf]
+s_endpgm 1
+// CHECK: [0x01,0x00,0x81,0xbf]
+
+s_endpgm 65535
+// CHECK: [0xff,0xff,0x81,0xbf]
+
s_branch 12609
// CHECK: [0x41,0x31,0x82,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
index 3aedcb08d0122..faa3c8595a235 100644
--- a/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx8_asm_sopp.s
@@ -9,6 +9,12 @@ s_nop 0xc1d1
s_endpgm
// CHECK: [0x00,0x00,0x81,0xbf]
+s_endpgm 1
+// CHECK: [0x01,0x00,0x81,0xbf]
+
+s_endpgm 65535
+// CHECK: [0xff,0xff,0x81,0xbf]
+
s_branch 12609
// CHECK: [0x41,0x31,0x82,0xbf]
diff --git a/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
index a19a2833a65ad..0a92d8c4b2392 100644
--- a/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx9_asm_sopp.s
@@ -9,6 +9,12 @@ s_nop 0xc1d1
s_endpgm
// CHECK: [0x00,0x00,0x81,0xbf]
+s_endpgm 1
+// CHECK: [0x01,0x00,0x81,0xbf]
+
+s_endpgm 65535
+// CHECK: [0xff,0xff,0x81,0xbf]
+
s_branch 12609
// CHECK: [0x41,0x31,0x82,0xbf]
diff --git a/llvm/test/MC/AMDGPU/sopp.s b/llvm/test/MC/AMDGPU/sopp.s
index 226a9f7d4e925..a5faa76a09328 100644
--- a/llvm/test/MC/AMDGPU/sopp.s
+++ b/llvm/test/MC/AMDGPU/sopp.s
@@ -22,6 +22,12 @@ s_nop 1
s_endpgm
// GCN: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
+s_endpgm 1
+// GCN: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf]
+
+s_endpgm 65535
+// GCN: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf]
+
s_branch 2
// GCN: s_branch 2 ; encoding: [0x02,0x00,0x82,0xbf]
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
index bbc25111254ca..874f6f6b3cf17 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx10_sopp.txt
@@ -137,6 +137,12 @@
# GFX10: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
0x00,0x00,0x81,0xbf
+# GFX10: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf]
+0x01,0x00,0x81,0xbf
+
+# GFX10: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf]
+0xff,0xff,0x81,0xbf
+
# GFX10: s_endpgm_ordered_ps_done ; encoding: [0x00,0x00,0x9e,0xbf]
0x00,0x00,0x9e,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
index 259a4910c959d..098a68ff48d31 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sopp.txt
@@ -127,6 +127,12 @@
# GFX11: s_endpgm ; encoding: [0x00,0x00,0xb0,0xbf]
0x00,0x00,0xb0,0xbf
+# GFX11: s_endpgm 1 ; encoding: [0x01,0x00,0xb0,0xbf]
+0x01,0x00,0xb0,0xbf
+
+# GFX11: s_endpgm 65535 ; encoding: [0xff,0xff,0xb0,0xbf]
+0xff,0xff,0xb0,0xbf
+
# GFX11: s_endpgm_saved ; encoding: [0x00,0x00,0xb1,0xbf]
0x00,0x00,0xb1,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
index 0857e58a89a23..e91d03b2dec62 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx8_sopp.txt
@@ -9,6 +9,12 @@
# CHECK: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
0x00,0x00,0x81,0xbf
+# CHECK: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf]
+0x01,0x00,0x81,0xbf
+
+# CHECK: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf]
+0xff,0xff,0x81,0xbf
+
# CHECK: s_branch 12609 ; encoding: [0x41,0x31,0x82,0xbf]
0x41,0x31,0x82,0xbf
diff --git a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
index 48db6bdfd2d30..bd83e0cd4f6e5 100644
--- a/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
+++ b/llvm/test/MC/Disassembler/AMDGPU/gfx9_sopp.txt
@@ -9,6 +9,12 @@
# CHECK: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf]
0x00,0x00,0x81,0xbf
+# CHECK: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf]
+0x01,0x00,0x81,0xbf
+
+# CHECK: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf]
+0xff,0xff,0x81,0xbf
+
# CHECK: s_branch 12609 ; encoding: [0x41,0x31,0x82,0xbf]
0x41,0x31,0x82,0xbf
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