[llvm] 97bdba8 - [exegesis] ParallelSnippetGenerator: SingleStaticRegPerOperand if 2+ use regs

[Roman Lebedev via llvm-commits]

Author: Roman Lebedev
Date: 2022-12-06T19:26:45+03:00
New Revision: 97bdba8171fc155d425a8e2cc8d1a64a0d70bbee

URL: https://github.com/llvm/llvm-project/commit/97bdba8171fc155d425a8e2cc8d1a64a0d70bbee
DIFF: https://github.com/llvm/llvm-project/commit/97bdba8171fc155d425a8e2cc8d1a64a0d70bbee.diff

LOG: [exegesis] ParallelSnippetGenerator: SingleStaticRegPerOperand if 2+ use regs

For instrs with tied operands, that strategy will not produce anything
different from `SingleStaticReg` unless there are at least two registers.

Added: 
    

Modified: 
    llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp
    llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

Removed: 
    


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diff  --git a/llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp b/llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp
index 0d284af12c76..c2691fea6344 100644
--- a/llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp
+++ b/llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp
@@ -325,7 +325,7 @@ ParallelSnippetGenerator::generateCodeTemplates(
   SmallVector<RegRandomizationStrategy, 3> Strategies;
   if (HasTiedOperands || NumUntiedUseRegs >= 3)
     Strategies.push_back(RegRandomizationStrategy::PickRandomRegs);
-  if (HasTiedOperands || NumUntiedUseRegs >= 2)
+  if (NumUntiedUseRegs >= 2)
     Strategies.push_back(RegRandomizationStrategy::SingleStaticRegPerOperand);
   Strategies.push_back(RegRandomizationStrategy::SingleStaticReg);
   for (RegRandomizationStrategy S : Strategies) {

diff  --git a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
index b6d25f0c0b92..3200ec50d2d5 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp
@@ -251,7 +251,7 @@ TEST_F(X86ParallelSnippetGeneratorTest, ReadAfterWrite_CMOV32rr) {
   // - hasAliasingRegisters
   const unsigned Opcode = X86::CMOV32rr;
   const auto CodeTemplates = checkAndGetCodeTemplates(Opcode);
-  ASSERT_THAT(CodeTemplates, SizeIs(3));
+  ASSERT_THAT(CodeTemplates, SizeIs(2));
   for (const auto &CT : CodeTemplates) {
     EXPECT_THAT(CT.Info, HasSubstr("avoiding Read-After-Write issue"));
     EXPECT_THAT(CT.Execution, ExecutionMode::UNKNOWN);