[PATCH] D139394: [RISCV] Add support for RISCV XVentanaCondops Extension

[Kautuk Consul via Phabricator via llvm-commits]

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This patch adds support for part of XVentanaCondops extension.
This extension is designed to reduce the number of branches in
the generated RISCV assembly by replacing branches with conditional
move instructions as defined by XVentanaCondops specification.

The specification for XVentanaCondops extension can be found at:
https://github.com/ventanamicro/ventana-custom-extensions/releases/download/v1.0.1/ventana-custom-extensions-v1.0.1.pdf


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D139394

Files:
  llvm/lib/Support/RISCVISAInfo.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoXVentanaCondops.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/CodeGen/RISCV/xventanacondops.ll
  llvm/test/MC/RISCV/rv64xventanacondops-invalid.s
  llvm/test/MC/RISCV/rv64xventanacondops-valid.s

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