[PATCH] D138922: [SPARC] Lower SELECT_CC to MOVr on 64-bit target whenever possible

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 5 15:07:01 PST 2022


arsenm added inline comments.


================
Comment at: llvm/lib/Target/Sparc/SparcISelLowering.cpp:2627-2629
+    const ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS);
+    if (is64Bit && isV9 && LHS.getValueType() == MVT::i64 && RHSC &&
+        RHSC->isZero() && !ISD::isUnsignedIntSetCC(CC))
----------------
can use isNullConstant


================
Comment at: llvm/lib/Target/Sparc/SparcInstrAliases.td:62-88
+// movr<cond> rs1, rs2, rd
+multiclass regcond_mov_alias<string rcond, int condVal,
+                          Instruction movrrr, Instruction movrri,
+                          Instruction fmovrs, Instruction fmovrd,
+                          Instruction fmovrq> {
+
+  // movr<cond> $rs1, $rs2, $rd
----------------
Could use assembler tests


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D138922/new/

https://reviews.llvm.org/D138922



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