[PATCH] D139363: [SDAG] try to convert bit set/clear to signbit test when trunc is free
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 5 14:05:50 PST 2022
MatzeB accepted this revision.
MatzeB added a comment.
This revision is now accepted and ready to land.
Oh I also had started working on the same thing (should have been more clear that about that when talking in the other diff).
Anyway you went for the same solution (and managed to do in a couple fewer lines than me), thanks for working on it!
Added a comment about interesting effects in some tests, either way LGTM.
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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3727-3728
+ AndC->getAPIntValue().isPowerOf2()) {
+ EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(),
+ AndC->getAPIntValue().getActiveBits());
+ if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) {
----------------
May want to check if `NarrowVT` is actually narrowed than the original type? (see test below).
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Comment at: llvm/test/CodeGen/X86/is_fpclass-fp80.ll:65-66
; CHECK-64-NEXT: setl %dl
-; CHECK-64-NEXT: shrq $63, %rcx
+; CHECK-64-NEXT: testq %rcx, %rcx
+; CHECK-64-NEXT: sets %cl
; CHECK-64-NEXT: testq %rax, %rax
----------------
I wonder if this is better or worse than before...
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139363/new/
https://reviews.llvm.org/D139363
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