[PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added inline comments.


================
Comment at: libunwind/test/unwind_scalable_vectors.pass.cpp:32
+          "# .cfi_def_cfa_expression sp + vlenb\n"
+          ".cfi_escape 0x0f, 0x07, 0x72, 0x00, 0x92, 0xa2, 0x38, 0x00, 0x22\n"
+          "call stepper\n"
----------------
This is: DW_OP_breg 0 DW_OP_bregx 0x3822 0 DW_OP_plus.

Why is 0x3822 used?




CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136264/new/

https://reviews.llvm.org/D136264