[PATCH] D139068: [AArch64][SVE] Allow to lower WHILEop operations with constant operands to PTRUE
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Dec 5 10:31:53 PST 2022
paulwalker-arm added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4824-4835
+ bool IsSignedWhileOp = (IntNo == Intrinsic::aarch64_sve_whilelt ||
+ IntNo == Intrinsic::aarch64_sve_whilele ||
+ IntNo == Intrinsic::aarch64_sve_whilegt ||
+ IntNo == Intrinsic::aarch64_sve_whilege);
+ bool IsLess = (IntNo == Intrinsic::aarch64_sve_whilelo ||
+ IntNo == Intrinsic::aarch64_sve_whilelt ||
+ IntNo == Intrinsic::aarch64_sve_whilels ||
----------------
This isn't quite what I had in mind when suggesting you can increase commonality. I had in mind a helper function that takes parameters like `IsSigned` and `IsLess` or perhaps even makes use of the existing `AArch64CC::CondCode` enum?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D139068/new/
https://reviews.llvm.org/D139068
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